A method of forming a strain relaxation layer in an epitaxial crystalline structure, the method comprising: providing a crystalline template layer comprising a material with a first natural relaxed in-plane lattice parameter; forming a first epitaxial crystalline layer on the crystalline template layer, wherein the first epitaxial crystalline layer has an initial electrical conductivity that is higher than the electrical conductivity of the crystalline template layer; forming a second epitaxial crystalline layer on the first epitaxial crystalline layer, wherein the second epitaxial crystalline layer has an electrical conductivity lower than the initial electrical conductivity of the first epitaxial crystalline layer and comprises a material with a second natural relaxed in-plane lattice parameter that is different to the first natural relaxed in-plane lattice parameter of the crystalline template layer; forming pores in the first epitaxial crystalline layer by electrochemical etching of the first epitaxial crystalline layer to enable strain relaxation in the second epitaxial crystalline layer by plastic deformation of bonds in the first epitaxial crystalline layer and/or at the interface between the first epitaxial crystalline layer and the second epitaxial crystalline layer; and forming one or more channels comprising a conductive material through at least the first epitaxial crystalline layer and the second epitaxial crystalline layer thereby to enable electrical connection to the crystalline template layer through the first epitaxial crystalline layer and the second epitaxial crystalline layer.

A method of fabricating and transferring high quality and manufacturable light-emitting devices, such as micro-sized light-emitting diodes (μLEDs), edge-emitting lasers and vertical-cavity surface-emitting lasers (VCSELs), using epitaxial later over-growth (ELO) and isolation methods. III-nitride semiconductor layers are grown on a host substrate using a growth restrict mask, and the III-nitride semiconductor layers on wings of the ELO are then made into the light-emitting devices. The devices are isolated from the host substrate to a thickness equivalent to the growth restrict mask and then transferred or lifted from of the host substrate. Back-end processing of the devices is then performed, such as attaching distributed Bragg reflector (DBR) mirrors, forming cladding layers, and/or adding heatsinks.

An image display device includes: a circuit element; a first interconnect layer electrically connected to the circuit element; a first insulating film covering the circuit element and the first interconnect layer; a light emitting element disposed on the first insulating film; a second insulating film covering at least a part of the light emitting element; a second interconnect layer electrically connected to the light emitting element and disposed on the second insulating film; and a first via extending through the first insulating film and the second insulating film, and electrically connecting the first interconnect layer and the second interconnect layer.

A light-emitting structure includes an n-type layer, an active layer, and a p-type layer. The active layer has N quantum well structure periods, each of the N quantum-well structure periods has a well layer and at least one barrier layer. The N quantum-well structure periods include a first light-emitting section and a second light-emitting section. The first light-emitting section is closer to the n-type layer than the second light-emitting section. A method for producing the light-emitting structure, and a light-emitting device that has the light-emitting structure are also disclosed.

A semiconductor light-emitting device includes a light-transmissible substrate, and a semiconductor light-emitting stack. The light-transmissible substrate is made of a first material, and has a first surface and a second surface opposite to the first surface. The first surface has a first region, and a second region which is formed with a plurality of protruding portions and a plurality of recessed portions formed therebetween. The recessed portions are disposed at a level lower than that of the first region relative to the second surface. The semiconductor light-emitting stack is disposed on the first region of the first surface along a stacking direction.

Provided are nanorod light emitting diodes (LEDs), display apparatuses, and manufacturing methods thereof. The nanorod LED includes a first-type semiconductor layer including a body and a pyramidal structure continuously provided from the body, a nitride light emitting layer provided on the pyramidal structure, and a second-type semiconductor layer provided in the nitride light emitting layer.

This application provides semiconductor structures and methods of manufacturing the same. A semiconductor structure includes: an N-type semiconductor layer, a light emitting layer, and a P-type ion doped layer that are disposed from bottom to up, wherein the P-type ion doped layer comprises an activated region and non-activated regions located on two sides of the activated region, P-type doping ions in the activated region are activated, and P-type doping ions in the non-activated region are passivated. The layout of the activated region and the non-activated regions makes an LED include: a high-efficiency light emitting region and light emitting obstacle regions located on two sides of the high-efficiency light emitting region.

A wafer includes a buried substrate; a layer of silicon (100) disposed on the buried substrate and forming multiple U-shaped grooves, wherein each U-shaped groove comprises a bottom portion and silicon sidewalls (111) at an angle to the buried substrate; a buffer layer disposed within the multiple U-shaped grooves; and multiple gallium nitride (GaN)-based structures having vertical sidewalls disposed within and protruding above the multiple U-shaped grooves, the multiple GaN-based structures each including cubic gallium nitride (c-GaN) formed at merged growth fronts of hexagonal gallium nitride (h-GaN) that extend from the silicon sidewalls (111).

A display apparatus is provided. The display apparatus includes a substrate, a transistor, a metal layer, and a light-emitting diode. The transistor is disposed on the substrate. The metal layer is disposed on the transistor and electrically connected to the transistor, wherein a first distance is between the upper surface of the metal layer and the substrate in a direction perpendicular to the substrate. The light-emitting diode is disposed on the metal layer, wherein the light-emitting diode includes a light-emitting diode body and an electrode, the light-emitting diode body is electrically connected to the metal layer via the electrode, the light-emitting diode body has a first surface and a second surface opposite to the first surface, the first surface and the second surface are parallel to the substrate, and in the direction above, a second distance is between the first surface and the second surface, wherein the ratio of the second distance to the first distance is greater than or equal to 0.25 and less than or equal to 6.

Direct-bonded LED arrays and applications are provided. An example process fabricates a LED structure that includes coplanar electrical contacts for p-type and n-type semiconductors of the LED structure on a flat bonding interface surface of the LED structure. The coplanar electrical contacts of the flat bonding interface surface are direct-bonded to electrical contacts of a driver circuit for the LED structure. In a wafer-level process, micro-LED structures are fabricated on a first wafer, including coplanar electrical contacts for p-type and n-type semiconductors of the LED structures on the flat bonding interface surfaces of the wafer. At least the coplanar electrical contacts of the flat bonding interface are direct-bonded to electrical contacts of CMOS driver circuits on a second wafer. The process provides a transparent and flexible micro-LED array display, with each micro-LED structure having an illumination area approximately the size of a pixel or a smallest controllable element of an image represented on a high-resolution video display.