A semiconductor chip of a light emitting diode includes a substrate, and an N-type gallium nitride layer, a quantum well layer, and a P-type gallium nitride layer stacked on the substrate successively, an N-type electrode electrically connected to the N-type gallium nitride layer, and a P-type electrode electrically connected to the P-type gallium nitride layer. The quantum well layer includes at least one quantum barrier and at least one quantum well stacked successively in sequence, wherein the growth pressure of the quantum barrier and the growth pressure of the quantum well are different, such that the interface crystal quality between the quantum well and the quantum barrier of the quantum well layer can be greatly improved to enhance the luminous efficiency of the semiconductor chip.

A surface roughening method includes the following steps: preparing a first epitaxial layer of a three-dimensional island shape growth over a light emitting structure; and preparing a discontinuous second epitaxial layer over the first epitaxial layer. The surface roughening method provided in the present application is simple and convenient, and improves the efficiency. In addition to the epitaxial growth process, it is not necessary to use an additional process such as wet etching, photonic crystal and other processes to further process the surface of the epitaxial layer, and the method may be implemented by means of one process in a same reaction equipment.

Techniques, devices, and systems are disclosed and include LEDs with a first flat region, at a first height from an LED base and including a plurality of epitaxial layers including a first n-layer, a first active layer, and a first p-layer. A second flat region is provided, at a second height from the LED base and parallel to the first flat region, and includes at least a second n-layer. A sloped sidewall connecting the first flat region and the second flat region is provided and includes at least a third n-layer, the first n-layer being thicker than at least a portion of third n-layer. A p-contact is formed on the first p-layer and an n-contact formed on the second n-layer.

A method for obtaining a smooth surface of an epi-layer with epitaxial lateral overgrowth. The method does not use mis-cut orientations and does not suppress the occurrence of pyramidal hillocks, but instead embeds the pyramidal hillocks in the epi-layer. A growth restrict mask is used to limit the expansion of the pyramidal hillocks in a lateral direction. The surface of the epi-layer becomes extremely smooth due to the disappearance of the pyramidal hillocks.

Techniques are disclosed for fabricating and using a neuromorphic computing device including biological neurons. For example, a method for fabricating a neuromorphic computing device includes forming a channel in a first substrate and forming at least one sensor in a second substrate. At least a portion of the channel in the first substrate is seeded with a biological neuron growth material. The second substrate is attached to the first substrate such that the at least one sensor is proximate to the biological neuron growth material and growth of the seeded biological neuron growth material is stimulated to grow a neuron in the at least a portion of the channel.

A method of forming an optoelectronic semiconductor device involves providing an amorphous substrate. A transparent and conductive oxide layer is deposited on the amorphous substrate. The transparent and conductive oxide layer is annealed to form an annealed transparent and conductive oxide layer having a cubic-oriented and/or rhombohedral-oriented surface. A nanorod array is formed on the cubic-oriented and/or rhombohedral-oriented surface of the annealed transparent and conductive oxide layer. The annealing of the transparent conductive oxide layer and the formation of the nanorod array are performed using molecular beam epitaxy (MBE). The nanorods of the nanorod array comprise a group-III material and are non-polar.

An optoelectronic device manufacturing method including the steps of: a) forming an active diode stack including first and second of opposite conductivity types; b) forming an integrated control circuit including a plurality of elementary control cells each including at least one MOS transistor; c) after steps a) and b), transferring the integrated control circuit onto the upper surface of the active diode stack; and d) after step c), forming trenches extending vertically through the integrated control circuit and emerging into or onto the first layer and delimiting a plurality of pixels each including a diode and an elementary control cell.

Provided are a light-emitting device, a method of preparing the light-emitting device, an ink composition including the light-emitting device, and an apparatus including the light-emitting device. The light-emitting device may include: a semiconductor region including a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer; a first protective layer on at least one portion of a surface of the semiconductor region and including a Group III-V compound; and a second protective layer on the first protective layer and including a metal oxide.

A light emitting element includes an n-side nitride semiconductor layer; an active layer disposed on the n-side nitride semiconductor layer and including a plurality of nitride semiconductor well layers and a plurality of nitride semiconductor barrier layers, the active layer being configured to emit ultraviolet light; and a p-side nitride semiconductor layer disposed on the active layer. At least one of the plurality of barrier layers including, successively from the n-side nitride semiconductor layer side, a first barrier layer containing Al and Ga, and a second barrier layer disposed in contact with the first barrier layer, containing Al, Ga, and In, and having a smaller band gap energy than the first barrier layer. At least one of the plurality of well layers is disposed in contact with a second barrier layer and has a smaller band gap energy than the second barrier layer.

Provided are a light emitting device having a support layer having a surface with a three-dimensional shape, a light emitting functional layer formed on the surface with a three-dimensional shape of the support layer, and a translucent electrode layer provided on a side of the light emitting functional layer opposite to the support layer. The support layer functions as a reflective electrode, and a light emitting functional layer formed on the surface with a three-dimensional shape of the support layer. The light emitting functional layer has two or more layers composed of semiconductor single crystal grains. Each of the two or more layers has a single crystal structure in a direction approximately normal to the surface with a three-dimensional shape.