A method to fabricate micro-size III-nitride light emitting diodes (μLEDs) with an epitaxial tunnel junction comprised of a p+GaN layer, an In.sub.xAl.sub.yGa.sub.zN insertion layer, and an n+GaN layer, grown using metalorganic chemical vapor deposition (MOCVD), wherein the μLEDs have a low forward the GaN layers, which reduces a depletion width of the tunnel junction and increases the tunneling probability. The μLEDs are fabricated with dimensions that vary from 25 to 10,000 μm.sup.2. It was found that the In.sub.xAl.sub.yGa.sub.zN insertion layer can reduce the forward voltage at 20 A/cm.sup.2 by at least 0.6 V. The tunnel junction μLEDs with an n-type and p-type In.sub.xAl.sub.yGa.sub.zN insertion layer had a low forward voltage at 20 A/cm.sup.2 that was very stable. At dimensions smaller than 1600 μm.sup.2, the low forward voltage is less than 3.2 V.

The semiconductor light-emitting element has an n-type semiconductor layer; an active layer provided on a first upper surface of the n-type semiconductor layer; a p-type semiconductor layer provided on the active layer; a p-side contact electrode provided in contact with the upper surface of the p-type semiconductor layer; a p-side current diffusion layer provided on the p-side contact electrode in a region narrower than a formation region of the p-side contact electrode; a p-side pad electrode provided on the p-side current diffusion layer; an n-side contact electrode provided in contact with a second upper surface of the n-type semiconductor layer; an n-side current diffusion layer provided on the n-side contact electrode over a region wider than a formation region of the n-side contact electrode, and including a TiN layer; and an n-side pad electrode provided on the n-side current diffusion layer.

Provided is a micro light emitting device and a display apparatus having the micro light emitting device. The micro light emitting device includes a first-type semiconductor layer provided on a substrate, a superlattice layer provided on the first-type semiconductor layer, a current blocking layer provided on a side portion of the superlattice layer, an active layer provided on the superlattice layer and the current blocking layer, and a second-type semiconductor layer provided on the active layer.

Exemplary semiconductor structures may include a silicon-containing substrate. The structures may include a first layer of a first metal nitride overlying the silicon-containing substrate. The structures may include a second layer of a second metal nitride overlying the first layer of the first metal nitride. The structures may include a gallium nitride structure overlying the layer of the metal nitride.

A micro light-emitting diode includes a first stacked layer, a second stacked layer, a third stacked layer, a bonding layer, at least one etch stop layer, and a plurality of electrodes. The second stacked layer is disposed between the first stacked layer and the third stacked layer. The first stacked layer includes a first active layer. The second stacked layer includes a second active layer. The third stacked layer includes a third active layer. The bonding layer is disposed between the second stacked layer and the third stacked layer. The at least one etch stop layer is at least disposed between the first active layer and the second active layer. The plurality of electrodes are respectively electrically connected with the first stacked layer, the second stacked layer, and the third stacked layer. At least one electrode of the plurality of electrodes contacts the etch stop layer.

LED structures and methods of manufacturing LED structure are provided. The LED structure includes: an LED light-emitting cell, including a first semiconductor layer, a light-emitting layer on the first semiconductor layer, and a second semiconductor layer on the light-emitting layer; a stress adjusting structure surrounding the LED light-emitting cell and applying stress to a sidewall of the LED light-emitting cell, where a lattice constant of a material of the stress adjusting structure is greater than lattice constants of materials in the LED light-emitting cell.

A process for producing a structure (100) comprising a membrane (3) of a first material, in particular indium-tin oxide, in contact with receiving ends (13) of a plurality of nanowires (1), the process comprising forming a nanowire device (10) comprising the receiving ends (13), the receiving ends being formed so as to form planar surfaces, and (ii) placing, especially by transfer, a membrane device (3; 34) directly on the nanowires the planar surfaces of the ends for receiving the membrane.

In at least one embodiment, the optoelectronic semiconductor chip comprises a semiconductor layer sequence with a radiation side, a first semiconductor layer of a first conductivity type, an active layer, a second semiconductor layer of a second conductivity type, and a rear side, which are arranged one above the other in this order. The active layer generates or absorbs primary electromagnetic radiation in the intended operation. Further, the optoelectronic semiconductor chip comprises a first contact structure and a second contact structure for electrically contacting the semiconductor layer sequence. The second contact structure is arranged on the rear side and is in electrical contact with the second semiconductor layer. The radiation side is configured for coupling in or coupling out primary radiation into or out of the semiconductor layer sequence. The rear side is structured and includes scattering structures configured to scatter and redirect the primary radiation.

In an embodiment an optoelectronic semiconductor component includes a first semiconductor layer of an n-conductivity type, the first semiconductor layer being of Al.sub.xGa.sub.1-xN composition, with 0.3≤x≤0.95, a second semiconductor layer of a p-conductivity type, an active zone between the first semiconductor layer and the second semiconductor layer, the active zone including a quantum well structure and an intermediate layer between the first semiconductor layer and the active zone, wherein the intermediate layer includes a semiconductor material of Al.sub.yGa.sub.1-yN composition, with x*1.05≤y≤1, and wherein the intermediate layer is located directly adjacent to the active zone.

A light emitting diode including a side reflection layer. The light emitting diode includes: a semiconductor stack and a light exit surface having a roughened surface through which light generated from an active layer is emitted; side surfaces defining the light exit surface; and a side reflection layer covering at least part of the side surfaces. The light exit surface is disposed over a first conductivity type semiconductor layer opposite to the ohmic reflection layer, all layers from the active layer to the light exit surface are formed of gallium nitride-based semiconductors, and a distance from the active layer to the light exit surface is 50 μm or more.