A substrate 10 comprises: a first layer L1 containing crystalline aluminum nitride; a second layer L2 containing crystalline α-alumina; and an intermediate layer Lm sandwiched between the first layer L1 and the second layer L2 and containing aluminum, nitrogen, and oxygen, and the content of nitrogen in the intermediate layer Lm decreases in a direction Z from the first layer L1 toward the second layer L2, and the content of oxygen in the intermediate layer Lm increases in the direction Z from the first layer L1 toward the second layer L2.

Disclosed are a display device and a manufacturing method thereof. The display device includes a plurality of pixels, a light emitting device provided in each of the plurality of pixels, the light emitting device having a first surface and a second surface, which are opposite to each other, a first electrode electrically connected to the first surface of the light emitting device, a second electrode electrically connected to the second surface of the light emitting device, and a metal oxide pattern interposed between the second surface of the light emitting device and the second electrode. The metal oxide pattern is provided to cover a portion of the second surface and to expose a remaining portion of the second surface. The second electrode is electrically connected to the exposed remaining portion of the second surface, and the metal oxide pattern includes single-crystalline or polycrystalline alumina.

The disclosure relates to a light emitting diode (LED) that is capable of emitting a plurality of lights having different wavelengths from one another, and independently controlling the intensity of the plurality of emitted lights and a manufacturing method of the LED, and a display device including the LED. Specifically, an LED according to the disclosure includes a first light emitting cell including an n-type semiconductor layer, a p-type semiconductor layer, and a first light emitting layer which respectively include at least one non-planar area, the first light emitting layer emitting a light of a first wavelength, a second light emitting cell including an n-type semiconductor layer, a p-type semiconductor layer, and a second light emitting layer which respectively consist of a planar area, the second light emitting layer emitting a light of a second wavelength different from the first wavelength of the light emitted from the first light emitting layer, a common electrode commonly connected with the first light emitting cell and the second light emitting cell, and a first pixel electrode and a second pixel electrode independently connected with each of the first light emitting cell and the second light emitting cell.

A light source includes an array of light emitters, with at least some light emitters having a central patterned surface and an unpatterned border; a light blocking metal layer positioned between each of the array of light emitters; and down-converter material positioned on each of the array of light emitters.

A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure may include: a first epitaxial layer disposed on a substrate; a bonding layer disposed on the first epitaxial layer (where the bonding layer is provided with a first through-hole to expose the first epitaxial layer); a silicon substrate disposed on a side of the bonding layer away from the first epitaxial layer (where the first epitaxial layer is bonded to the silicon substrate by the bonding layer, the silicon substrate is provided with a through-silicon-via, and the through-silicon-via communicates with the first through-hole); a silicon device disposed on the silicon substrate; and a second epitaxial layer disposed on the first epitaxial layer exposed by the first through-hole. The present disclosure can improve the quality of the second epitaxial layer, and realize the integration of a silicon device and a III-V semiconductor device.

A method of manufacturing a light-emitting element includes: providing a semiconductor structure including: a first layer containing gallium and nitrogen, a second layer of a first conductive type, the second layer containing gallium, aluminum, and nitrogen and being located on or above the first layer, an active layer located on or above the second layer, and a third layer of a second conductive type, the third layer located on or above the active layer, wherein a thickness of the first layer is larger than a thickness of the second layer; performing chemical-mechanical polishing from a first layer side to reduce the thickness of the first layer; and performing dry etching from the first layer side to remove the first layer and reduce the thickness of the second layer.

A nitride semiconductor ultraviolet light-emitting element is provided. The element includes a light-emitting element structure part with an n-type layer, an active layer, and a p-type layer stacked vertically, which are made of AlGaN-based semiconductors with wurtzite structure. The n-type layer has an n-type AlGaN-based semiconductor, the active layer has well layers including an AlGaN based semiconductor, and the p-type layer has a p-type AlGaN-based semiconductor. Each semiconductor layer in the n-type and the active layers is an epitaxially grown layer having a surface on which multi-step terraces parallel to the (0001) plane are formed. The n-type layer has first Ga-rich regions which include n-type AlGaN regions in which an AlGaN composition ratio is an integer ratio of Al.sub.2Ga.sub.1N.sub.3. The well layer includes a second Ga-rich region, which includes an AlGaN region in which an AlGaN composition ratio is an integer ratio of Al.sub.1Ga.sub.1N.sub.2 or Al.sub.5Ga.sub.7N.sub.12.

A process comprising the following steps of: a) providing a device comprising: a GaN/InGaN structure comprising an electrically conductive doped GaN layer locally covered with InGaN mesas comprising a doped InGaN layer and an undoped or weakly doped InGaN layer, an electrically insulating layer covering the electrically conductive doped GaN layer between the mesas, b) connecting the electrically conductive doped GaN layer and a counter-electrode (500) to a voltage or current generator, c) dipping the device and the counter-electrode into an electrolyte solution, d) applying a voltage or current between the electrically conductive doped GaN layer and the second electrode to porosify the doped InGaN layer, e) forming an InGaN layer by epitaxy on the InGaN mesas, whereby a relaxed epitaxially grown InGaN layer is obtained.

An embodiment discloses an ultraviolet light emitting element including: a light emitting structure including a first conductive semiconductor layer, a second conductive semiconductor layer, an active layer disposed between the first conductive semiconductor layer and the second conductive semiconductor layer, and an etched region in which the first conductive semiconductor layer is exposed; a first insulating layer disposed on the light emitting structure and including a first hole which exposes a portion of the etched region; a first electrode electrically connected to the first conductive semiconductor layer; and a second electrode electrically connected to the second conductive semiconductor layer, wherein the light emitting structure includes an intermediate layer regrown on the first conductive semiconductor layer exposed in the first hole, the first electrode is disposed on the intermediate layer, the etched region includes a first etched region disposed at an inner side and a second etched region disposed at an outer side based on an outer side surface of the first electrode, and a ratio of an area of the first etched region and an area of the intermediate layer is 1:0.3 to 1:0.7, and a light emitting element package including the same.

A s method for manufacturing a semiconductor device structure is provided. The method includes providing a substrate; providing a first light-emitting feature on the substrate, wherein the first light-emitting feature is utilized to emit a fluorescence comprising a first wavelength; providing an overlay mark structure on the first light-emitting feature, wherein the overlay mark structure is configured to absorb or reflect the fluorescence emitted from the first light-emitting feature; and providing a first conductive feature at least laterally overlapping the overlay mark structure.