An ultraviolet light-emitting diode chip, including: a n-type semiconductor layer; an intermediate layer disposed on the n-type semiconductor layer, the intermediate layer including a plurality of first tapered pits; an active layer disposed on the intermediate layer; a p-type semiconductor layer disposed on the active layer; a n-type electrode disposed on the n-type semiconductor layer; a p-type electrode disposed on the p-type semiconductor layer; a reflecting layer; a bonding layer; and a substrate. The reflecting layer and the bonding layer are disposed between the p-type electrode and the substrate. The active layer includes a plurality of second tapered pits each in a shape of hexagonal pyramid and a plurality of first flat regions connecting every two adjacent second tapered pits. The projected area of the plurality of first flat regions is less than 30% of the projected area of the active layer.

A method includes: bonding a surface of a first wafer on a side having a semiconductor layer to a surface of a second wafer on a side having a first electrode to electrically connect the semiconductor layer and the first electrode; etching a silicon substrate such that a first portion of the silicon substrate remains in a region overlapping with the first electrode in a plan view; etching the semiconductor layer using the first portion as a mask such that a portion of the semiconductor layer between the first portion and the first electrode remains as at least one light-emitting portion; forming a resin layer to cover a lateral surface of the first portion and a lateral surface of the light-emitting portion with the resin layer; removing the first portion to expose the light-emitting portion; and forming a light-transmissive electrically conductive film on or above the light-emitting portion.

The present disclosure provides a light-emitting diode chip, which includes a substrate, an epitaxial structure, an electrode metal layer, and a eutectic metal layer. The eutectic metal layer has an elongation greater than that of the electrode metal layer, and a hardness less than that of the electrode metal layer.

The present disclosure provides an inorganic light-emitting diode chip, a method for preparing the same, and a display substrate. The inorganic light-emitting diode chip includes: an undoped gallium nitride layer and a light-emitting unit arranged on the undoped gallium nitride layer, the light-emitting unit includes a first light-emitting subunit including a first N-type gallium nitride layer, a first multi-quantum well layer and a first P-type gallium nitride layer that are sequentially arranged, and a second light-emitting subunit including a second P-type gallium nitride layer, a second multi-quantum well layer and a second N-type gallium nitride layer that are sequentially arranged on a surface of the first P-type gallium nitride layer; an orthogonal projection of the second multi-quantum well layer on the undoped gallium nitride layer is smaller than an orthogonal projection of the first multi-quantum well layer on the undoped gallium nitride layer.

An object of the present disclosure is to provide a technique capable of attaining an AlN template which has less strain and is suitable for producing the ultraviolet LED. Provided is a nitride semiconductor laminate structure, including at least a sapphire substrate, a first AlN layer formed on a principal surface of the sapphire substrate, and a second AlN layer formed on the first AlN layer, wherein an absolute value of a strain amount ε.sub.2 of the second AlN layer in the a-axis direction is smaller than an absolute value of a strain amount ε.sub.1 of the first AlN layer in the a-axis direction.

A micro light emitting diode including a mesa comprising an epitaxial structure and having a top surface with an area less than 10 micrometers by 10 micrometers, less than 1 micrometer by 1 micrometer, or less than 0.5 micrometers by 0.5 micrometers; a dielectric on the top surface; and a via hole in the dielectric that is centered or self aligned on the top surface, e.g., perfectly centered or centered within 0.5% of the center of the top surface. In one or more examples, the micro light emitting diode is plasma damage free. Metallization in the via hole is used to electrically contact the micro light emitting diode.

A method for manufacturing a light emitting element includes forming a first semiconductor structure including a first semiconductor layer doped with a first conductivity type dopant disposed on a base substrate, a light emitting layer disposed on the first semiconductor layer, and a second semiconductor layer disposed on the light emitting layer and doped with a second conductivity type dopant; forming a second semiconductor structure spaced apart from another second semiconductor structure on the base substrate by etching the first semiconductor structure in a direction perpendicular to a surface of the base substrate; and activating a second conductivity type dopant in the second semiconductor layer of the second semiconductor structure to form a light emitting element core.

A device, such as a light-emitting device, e.g. a laser device, comprising: a plurality of group III-V semiconductor NWs grown on one side of a graphitic substrate, preferably through the holes of an optional hole-patterned mask on said graphitic substrate; a first distributed Bragg reflector or metal mirror positioned substantially parallel to said graphitic substrate and positioned on the opposite side of said graphitic substrate to said NWs; optionally a second distributed Bragg reflector or metal mirror in contact with the top of at least a portion of said NWs; and wherein said NWs comprise aim-type doped region and a p-type doped region and optionally an intrinsic region there between.

Systems, apparatus, and methods are described for a disinfection system formed of a plurality of modular units, wherein each modular unit is (1) coupleable to at least one other modular unit from the plurality of modular units and (2) includes an energy source from a plurality of energy sources. The plurality of energy sources can be configured to provide energy having an intensity capable of disinfecting a surface of the object located in a disinfecting area. The disinfection system can be used with object indicator tags and/or include one or more safety features.

A method for manufacturing a semiconductor element of the present disclosure includes: a step of preparing a substrate; a first element forming step of forming a first semiconductor layer in a first region on a surface of the substrate; a first element separating step of separating the first semiconductor layer from the substrate; and a second element forming step of forming a second semiconductor layer in a second region on the surface of the substrate from which the first semiconductor layer is separated. Additionally, in the method for manufacturing a semiconductor element of the present disclosure, at least a portion of the second region overlaps the first region.