Patent classifications
H01L2221/1047
ELECTRONIC DEVICES COMPRISING SILICON CARBIDE MATERIALS AND RELATED METHODS AND SYSTEMS
An electronic device comprising a stack structure comprising one or more stacks of materials and one or more silicon carbide materials adjacent to the one or more stacks of materials. The materials of the one or more stacks comprise a single chalcogenide material and one or more of a conductive carbon material, a conductive material, and a hardmask material. The one or more silicon carbide materials comprises silicon carbide, silicon carboxide, silicon carbonitride, silicon carboxynitride, and also comprise silicon-carbon covalent bonds. The one or more silicon carbide materials is configured as a liner or as a seal. Additional electronic devices are disclosed, as are related systems and methods of forming an electronic device.
DIELECTRIC LAYER, INTERCONNECTION STRUCTURE USING THE SAME, AND MANUFACTURING METHOD THEREOF
A structure includes a first dielectric film and a second dielectric film. The second dielectric film is formed on and in contact with the first dielectric film, in which a first pore is formed between the first dielectric film and the second dielectric film, and a thickness of the first dielectric film is smaller than a diameter of the first pore.
SEMICONDUCTOR DEVICE
A structure of semiconductor device includes a substrate, having a dielectric layer on top. The structure further includes at least two metal elements being adjacent, disposed in the dielectric layer, wherein an air gap is existing between the two metal elements. The air gap has a cross-section of substantially bottle shape with a flat top. A porous dielectric layer is disposed over the substrate, sealing the flat top of the air gap. An inter-layer dielectric layer disposed on the porous dielectric layer.
Semiconductor device
A structure of semiconductor device includes a substrate, having a dielectric layer on top. The structure further includes at least two metal elements being adjacent, disposed in the dielectric layer, wherein an air gap is existing between the two metal elements. A porous dielectric layer is disposed over the substrate, sealing the air gap. An inter-layer dielectric layer disposed on the porous dielectric layer.
SEMICONDUCTOR DEVICE WITH CONNECTING STRUCTURE HAVING A STEP-SHAPED CONDUCTIVE FEATURE AND METHOD FOR FABRICATING THE SAME
The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a first semiconductor structure, a first connecting structure, and a second semiconductor structure positioned on the first connecting structure. The first connecting structure includes a first connecting insulating layer positioned on the first semiconductor structure, two first conductive layers positioned in the first connecting insulating layer, and a first porous layer positioned between the two first conductive layers. The second semiconductor structure is positioned on the first connecting structure and includes two second conductive features positioned on the two first conductive layers. The first conductive layer has a first width, the second conductive feature has a second width greater than the first width, and the different width forms a step-shaped cross-sectional profile near an interface of the first conductive layer and the second conductive feature.
Semiconductor device with connecting structure having a step-shaped conductive feature and method for fabricating the same
The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a first semiconductor structure, a first connecting structure, and a second semiconductor structure positioned on the first connecting structure. The first connecting structure includes a first connecting insulating layer positioned on the first semiconductor structure, two first conductive layers positioned in the first connecting insulating layer, and a first porous layer positioned between the two first conductive layers. The second semiconductor structure is positioned on the first connecting structure and includes two second conductive features positioned on the two first conductive layers. The first conductive layer has a first width, the second conductive feature has a second width greater than the first width, and the different width forms a step-shaped cross-sectional profile near an interface of the first conductive layer and the second conductive feature.
SEMICONDUCTOR STRUCTURE FORMATION
Systems, apparatuses, and methods related to semiconductor structure formation are described. An example apparatus includes a structural material for a semiconductor device. The structural material includes an orthosilicate derived oligomer having a number of oxygen (O) atoms each chemically bonded to one of a corresponding number of silicon (Si) atoms and a chemical bond formed between an element from group 13 of a periodic table of elements (e.g., B, Al, Ga, In, and Tl) and the number of O atoms of the orthosilicate derived oligomer. The chemical bond crosslinks chains of the orthosilicate derived oligomer to increase mechanical strength of the structural material, relative to the structural material formed without the chemical bond to crosslink the chains, among other benefits described herein.
SEMICONDUCTOR DEVICE CONTAINING METAL-ORGANIC FRAMEWORK INTER-LINE INSULATOR STRUCTURES AND METHODS OF MANUFACTURING THE SAME
A structure, such as a semiconductor device, includes metal line structures located over a substrate and laterally spaced apart from each other. Each of the metal line structures includes planar metallic liner including a first metal element and a metal line body portion includes a second metal element that is different from the first metal element. Metal-organic framework (MOF) material portions are located between neighboring pairs of the metal line structures and contain metal ions or clusters of the first metal element and organic ligands connected to the metal ions or clusters of the first metal element. Air gaps may be formed in the MOF material portions to further reduce the effective dielectric constant.
Semiconductor device, method of manufacturing semiconductor device, and electronic apparatus
A semiconductor device including a plurality of substrates that is stacked, each of the substrates including a semiconductor substrate and a multi-layered wiring layer stacked on the semiconductor substrate, the semiconductor substrate having a circuit with a predetermined function formed thereon. Bonding surfaces between two substrates among the plurality of substrates have an electrode junction structure in which electrodes formed on the respective bonding surfaces are joined in direct contact with each other, the electrode junction structure being a structure for electrical connection between the two substrates. One of the electrode constituting the electrode junction structure or a via for connection of the electrode to a wiring line in the multi-layered wiring layer is provided with a porous film, in a partial region between an electrically-conductive material and a sidewall of a through hole filled with the electrically-conductive material, the electrically-conductive material constituting the electrode and the via.
Porogen Bonded Gap Filling Material in Semiconductor Manufacturing
A device includes a substrate; a first layer over the substrate, the first layer containing a plurality of fin features and a trench between two adjacent fin features. The device also includes a porous material layer having a first portion and a second portion. The first portion is disposed in the trench. The second portion is disposed on a top surface of the first layer. The first and the second portions contain substantially same percentage of Si, substantially same percentage of O, and substantially same percentage of C.