Patent classifications
H01L2221/68327
METHOD OF PROCESSING WAFER
A method of processing a wafer having a plurality of devices formed in respective areas on a face side of the wafer, the areas being demarcated by a plurality of intersecting projected dicing lines, includes a low-viscosity resin applying step of coating the face side of the wafer with a first liquid resin of low viscosity to cover an area of the wafer where the plurality of devices are present, a high-viscosity resin applying step of, after the low-viscosity resin applying step, coating the face side of the wafer with a second liquid resin of higher viscosity than the first liquid resin in overlapping relation to the first liquid resin, a resin curing step of curing the first liquid resin and the second liquid resin that have coated the face side of the wafer into a protective film, and a planarizing step of planarizing the protective film.
METHOD OF PROCESSING WAFER
A method of processing a wafer having a plurality of devices formed in respective areas on a face side of the wafer, the areas being demarcated by a plurality of intersecting projected dicing lines, includes a resin applying step of coating the face side of the wafer with a liquid resin to cover an area of the wafer where the plurality of devices are present, a resin curing step of curing the liquid resin into a protective film, a protective tape laying step of laying a protective tape on an upper surface of the protective film, and a planarizing step of planarizing a face side of the protective tape.
PACKAGE DEVICE
The present disclosure provides a package device and a manufacturing method thereof. The package device includes an electronic device, a conductive pad having a first bottom surface, and a redistribution layer disposed between the conductive pad and the electronic device. The redistribution layer has a second bottom surface, and the conductive pad is electrically connected to the electronic device through the redistribution layer. The first bottom surface is closer to the electronic device than the second bottom in a normal direction of the electronic device.
WAFER PROCESSING SHEET AND WAFER PROCESSING METHOD
A sheet for processing a wafer, including a substrate sheet that comes into contact with a main surface of the wafer, wherein the substrate sheet has an exponential coefficient in an exponential trendline for storage modulus E′.sub.30-80 at 30° C. to 80° C. of −0.035 to −0.070.
HEAT-RESISTANT FILM
An object of the present invention is to provide a heat-resistant film that is suitable for protection of a surface provided with electrical conduction, decoration or the like in a plastic product, a glass product, a ceramic product, and the like, or that is suitable for holding a semiconductor, dies, and the like in producing dies through dicing and singulation. The film that solves the above object is a heat-resistant film comprising a thermoplastic resin, wherein (a) the thermoplastic resin is a polyester-based elastomer comprising a hard segment and a soft segment that are linked to each other, (b) the hard segment comprises a polyester unit constituted from an aromatic dicarboxylic acid and an aliphatic diol or an alicyclic diol, (c) the soft segment is constituted mainly from the prescribed polycarbonate, (d) a weight ratio of the hard segment contained in the polyester-based elastomer exceeds 50%, and (e) the film comprising the thermoplastic resin has an elastic modulus of 30 to 500 MPa, an elongation at break of 200 to 700%, and a ratio F50/F25 of 1.05 or more, the ratio F50/F25 being a ratio of a stress F50 at an elongation of 50% to a stress F25 at an elongation of 25%.
MANUFACTURING OF ELECTRONIC COMPONENTS
The present disclosure concerns a method of manufacturing an electronic component and the obtained component, comprising a substrate, comprising the successive steps of: depositing a first layer of a first resin activated by abrasion to become electrically conductive, on a first surface of said substrate comprising at least one electric contact and, at least partially, on the lateral flanks of said substrate; partially abrading said first layer on the flanks of said substrate.
TSV and Backside Power Distribution Structure
A semiconductor device includes an electronic circuit within a device layer; wherein the device layer is between a thin layer of wiring for signal connections having a first thickness and a thick layer of wiring for power having a second thickness, the second thickness being greater than the first thickness; a silicon layer above the device layer, the thin layer of wiring, and the thick layer of wiring; a first via connection from a top of the semiconductor device to the thin layer of wiring; a second via connection from the top of the semiconductor device to the thick layer of wiring; and a packaging substrate with a connection to the thick layer of wiring.
SEMICONDUCTOR DEVICE AND METHODS OF FORMING THE SAME
Embodiments provide a precutting technique to cut parallel openings at a front surface of a device wafer, then flipping the device wafer over and completing the cut from the back side of the device wafer to singulate a die from the wafer. The precutting technique and back side cutting technique combined provides an indentation in the side surface(s) of the device.
Method for fabricating a semiconductor package, semiconductor package and embedded PCB module
A method for fabricating a semiconductor package includes: providing a semiconductor wafer having opposing first and second sides, the semiconductor wafer being arranged on a first carrier such that the second side of the wafer faces the carrier; masking sawing lines on the first side of the semiconductor wafer with a mask; depositing a first metal layer on the masked first side of the semiconductor wafer by cold spraying or by high velocity oxygen fuel spraying or by cold plasma assisted deposition, such that the first metal layer does not cover the sawing lines, the deposited first metal layer having a thickness of 50 μm or more; singulating the semiconductor wafer into a plurality of semiconductor dies by sawing the semiconductor wafer along the sawing lines; and encapsulating the plurality of semiconductor dies with an encapsulant such that the first metal layer is exposed on a first side of the encapsulant.
PROCESSES AND APPLICATIONS FOR CATALYST INFLUENCED CHEMICAL ETCHING
A system for assembling fields from a source substrate onto a second substrate. The source substrate includes fields. The system further includes a transfer chuck that is used to pick at least four of the fields from the source substrate in parallel to be transferred to the second substrate, where the relative positions of the at least four of the fields is predetermined.