A display module includes a thin film transistor (TFT) substrate including a class substrate and a TFT layer provided on a front surface of the glass substrate, the TFT layer including a TFT circuit, a plurality of light emitting diodes provided on the TFT layer, a plurality of first connection pads provided at a distance from each other on the front surface of the glass substrate and connected to the TFT circuit, a plurality of second connection pads provided at a distance from each other on a rear surface of the glass substrate and connected to a second circuit, where the second circuit is configured to supply power and is connected to a control board, and a plurality of side wirings electrically connecting each of the plurality of first connection pads to respective connection pads of the plurality of second connection pads.

A 3D semiconductor device, the device including: a first level including a first single crystal layer and first single crystal transistors; a first metal layer; a second metal layer disposed atop the first metal layer; second transistors disposed atop of the second metal layer; third transistors disposed atop of the second transistors, where at least one of the third transistors includes at least one replacement gate, being processed to replace a non-metal gate material with a metal based gate, and where a distance from at least one of the third transistors to at least one of the first transistors is less than 2 microns.

A 3D semiconductor device, the device comprising: a first level comprising a first single crystal layer, said first level comprising first transistors, wherein each of said first transistors comprises a single crystal channel; first metal layers interconnecting at least said first transistors; a second metal layer overlaying said first metal layers; and a second level comprising a second single crystal layer, said second level comprising second transistors, wherein said second level overlays said first level, wherein at least one of said first transistors controls power delivery for at least one of said second transistor, wherein said second level is directly bonded to said first level, and wherein said bonded comprises direct oxide to oxide bonds.

A method for manufacturing a semiconductor device includes a step of preparing a semiconductor wafer source which includes a first main surface on one side, a second main surface on the other side and a side wall connecting the first main surface and the second main surface, an element forming step of setting a plurality of element forming regions on the first main surface of the semiconductor wafer source, and forming a semiconductor element at each of the plurality of element forming regions, and a wafer source separating step of cutting the semiconductor wafer source from a thickness direction intermediate portion along a horizontal direction parallel to the first main surface, and separating the semiconductor wafer source into an element formation wafer and an element non-formation wafer after the element forming step.

Discussed are a device for self-assembling semiconductor light-emitting diodes, in which the device includes an assembly chamber having a space for accommodating a fluid; a magnetic field forming part having at least one magnet for applying a magnetic force to the semiconductor light-emitting diodes dispersed in the fluid and a moving part for changing positions of the at least one magnet so that the semiconductor light-emitting diodes move in the fluid; and a substrate chuck having a substrate support part configured to support a substrate, and a vertical moving part for lowering the substrate so that one surface of the substrate is in contact with the fluid in a state in which the substrate is supported by the substrate support part, wherein the vertical moving part provided at the substrate chuck lowers the substrate on to the fluid so that a force of buoyancy by the fluid is applied to the substrate.

A package carrier includes a carrier and a light absorption layer. The light absorption layer is disposed on the carrier. The light absorption layer includes a notch at the periphery of the carrier, and the notch is light transmissive so as to expose the carrier to light in a normal direction of the carrier. A semiconductor manufacturing process is also provided.

Electronic devices are formed on donor substrates and transferred to carrier substrates by forming bonding regions on the electronic devices and bonding the bonding regions to a carrier substrate. The transfer process may include forming anchors and removing sacrificial regions.

Some embodiments include a method. The method can include providing a scintillator structure. Providing the scintillator structure can include providing a scintillator support layer, providing a scintillator layer, and coupling the scintillator layer to the scintillator support layer. Meanwhile, the scintillator support layer has a substantially non-planar surface, the scintillator layer having a first surface and a second surface opposite the first surface and being configured to scintillate, and the first surface of the scintillator layer is coupled to the substantially non-planar surface of the scintillator support layer such that the second surface of the scintillator layer has a contour of the substantially non-planar surface of the scintillator support layer. Other embodiments of related methods and systems are also disclosed.

A wafer bonding technique to fabricate GaN devices is disclosed. In this technique, a GaN layer (or a GaN stack including at least one GaN layer) is fabricated on a first substrate (e.g., a silicon substrate) and has a high quality surface with a dislocation density less than 10.sup.10/cm.sup.2. The assembly of the first substrate and the GaN layer is then bonded to a second substrate (e.g., a carbide substrate or an AlN substrate) by coupling the high quality surface to the second substrate. The high quality of the GaN surface in contact with the carbide substrate creates a good thermal contact. The first substrate is etched away to expose a GaN surface for further processing, such as electrode formation.

A peeling method at low cost with high mass productivity is provided. A resin layer having a thickness greater than or equal to 0.1 μm and less than or equal to 3 μm is formed over a formation substrate using a photosensitive and thermosetting material, a transistor including an oxide semiconductor in a channel formation region is formed over the resin layer, the resin layer is irradiated with light using a linear laser device, and the transistor and the formation substrate are separated from each other. A first region and a second region which is thinner than the first region or an opening can be formed in the resin layer. In the case of forming a conductive layer functioning as an external connection terminal or the like to overlap with the second region or the opening of the resin layer, the conductive layer is exposed.