Described herein is a die-to-wafer bonding process that utilizes micro-transfer printing to transfer die from a source wafer onto an intermediate handle wafer. The resulting intermediate handle wafer structure can then be bonded die-down onto the target wafer, followed by removal of only the intermediate handle wafer, leaving the die in place bonded to the target wafer.

In an embodiment, an apparatus includes an energy source, a support platform for holding a wafer, an optical path extending from the energy source to the support platform, and a photomask aligned such that a patterned major surface of the photomask is parallel to the force of gravity, where the optical path passes through the photomask, where the patterned major surface of the photomask is perpendicular to a topmost surface of the support platform.

A semiconductor device package and a method of forming the same are provided. The semiconductor device package includes a package substrate having a first surface and a second surface opposite to the first surface. Several integrated devices are bonded to the first surface of the package substrate. A first underfill element is disposed over the first surface and surrounds the integrated devices. A first molding layer is disposed over the first surface and surrounds the integrated devices and the first underfill element. A semiconductor die is bonded to the second surface of the package substrate. A second underfill element is disposed over the second surface and surrounds the semiconductor die. A second molding layer is disposed over the second surface and surrounds the semiconductor die and the second underfill element. Several conductive bumps are disposed over the second surface and adjacent to the second molding layer.

Provide are a transfer system and a transfer method. The transfer system is configured to transfer chips and includes a temporary substrate and a transfer device. The temporary substrate has a first surface and a second surface opposite to each other. There is a first angle between the second surface and the first surface. The transfer device has a transfer substrate and a plurality of transfer heads provided on the transfer substrate. The transfer substrate has a third surface and a fourth surface opposite to each other, and there is a second angle between the fourth surface and the third surface. The plurality of transfer heads are located at intervals on the fourth surface, and a side surface of the above-mentioned transfer head that faces away from the transfer substrate is parallel to the fourth surface.

A semiconductor package includes: a lower package; and an upper package stacked on the lower package, wherein the lower package includes: a first redistribution structure; a semiconductor chip mounted on the first redistribution structure; a first molding layer surrounding the semiconductor chip on the first redistribution structure; and first vertical connection conductors disposed on the first redistribution structure and vertically passing through the first molding layer, wherein the upper package includes: a second molding layer disposed on the lower package; second vertical connection conductors vertically passing through the second molding layer and electrically connected to the first vertical connection conductors; and an antenna structure disposed on the second molding layer.

A method for transferring at least one chip, from a first support to a second support, includes forming, while the chip is assembled to the first support, an interlayer in the liquid state between, and in contact with, a front face of the chip and an assembly surface of a face of the second support and a solidification of the interlayer. Then, the chip is detached from the first support while maintaining the interlayer in the solid state.

A method of making a semiconductor device may include providing a large semiconductor die comprising conductive interconnects with a first encapsulant disposed over four side surfaces of the large semiconductor die, over the active surface of the large semiconductor die, and around the conductive interconnects. A first build-up interconnect structure may be formed over the large semiconductor die and over the first encapsulant. Vertical conductive interconnects may be formed over the first build-up interconnect structure and around an embedded device mount site. An embedded device comprising through silicon vias (TSVs) may be disposed over the embedded device mount site. A second encapsulant may be disposed over the build-up structure, and around at least five sides of the embedded device. A second build-up structure may be formed disposed over the planar surface and configured to be electrically coupled to the TSVs of the embedded device and the vertical conductive interconnects.

Disclosed is a light-emitting structure including a light-emitting diode and a connecting unit. The light-emitting diode includes an epitaxial laminate, a first electrode, and a second electrode. The epitaxial laminate includes a first type semiconductor layer, a second type semiconductor layer, and a light-emitting layer. The connecting unit is connected to the epitaxial laminate.

Before a semiconductor die of a brittle III-V compound semiconductor is encapsulated with a molding compound during package fabrication, side surfaces of the semiconductor die are treated to avoid or prevent surface imperfections from propagating and fracturing the crystal structure of the substrate of the III-V compound semiconductor under the stresses applied as the molding compound solidifies. Surfaces are treated to form a passivation layer, which may be a passivated layer of the substrate or a passivation material on the substrate. In a passivated layer, imperfections of an external layer are transformed to be less susceptible to fracture. Passivation material, such as a poly-crystalline layer on the substrate surface, diffuses stresses that are applied by the molding compound. Semiconductor dies in flip-chip and wire-bond chip packages with treated side surfaces as disclosed have a reduced incidence of failure caused by die fracturing.

Disclosed in the present specification are a micro LED display device in which an assembly electrode capable of forming a non-uniform electric field is assembled in a provided assembly hole, and a manufacturing method therefor. The display device according to one embodiment of the present invention comprises: a substrate; a first assembly electrode and a second assembly electrode arranged to be spaced apart on the substrate; an insulating layer deposited on top of the first assembly electrode and the second assembly electrode; an assembly hole defining a pixel area formed on the insulating layer; a semiconductor light-emitting element assembled in the assembly hole; and a wiring electrode electrically connected to the semiconductor light-emitting element, wherein the first assembly electrode and the second assembly electrode have a pattern for generating non-uniform electric field in the assembly hole by means of applied voltage, and the semiconductor light-emitting element is assembled, on the basis of the non-uniform electric field, at a specific location in the assembly hole after moving in a specific direction.