A method of printing comprises providing a component source wafer comprising components, a transfer device, and a patterned substrate. The patterned substrate comprises substrate posts that extend from a surface of the patterned substrate. Components are picked up from the component source wafer by adhering the components to the transfer device. One or more of the picked-up components are printed to the patterned substrate by disposing each of the one or more picked-up components onto one of the substrate posts, thereby providing one or more printed components in a printed structure.

A printed structure includes a destination substrate comprising two or more contact pads disposed on or in a surface of the destination substrate, a component disposed on the surface, and two or more electrically conductive connection posts. Each of the connection posts extends from a common side of the component. Each of the connection posts is in electrical and physical contact with one of the contact pads. The component is tilted with respect to the surface of the destination substrate. Each of the connection posts has a flat distal surface.

A printed structure includes a destination substrate comprising two or more contact pads disposed on or in a surface of the destination substrate, a component disposed on the surface, and two or more electrically conductive connection posts. Each of the connection posts extends from a common side of the component. Each of the connection posts is in electrical and physical contact with one of the contact pads. The component is tilted with respect to the surface of the destination substrate. Each of the connection posts has a flat distal surface.

A method of manufacturing a display device according to the present invention involves assembling a semiconductor light emitting element to an assembly substrate and then transferring the same to a wiring substrate, wherein, during self-assembly using magnetic and electric fields, the semiconductor light emitting element is fixed to the assembly substrate by forming a covalent bond between the semiconductor light emitting element and the assembly substrate so that the semiconductor light emitting element does not become separated from the assembly substrate, and when transferring the assembled object to the wiring substrate, the formed covalent bond is broken down so that the semiconductor light emitting element can be easily detached from the assembly substrate.

An adsorption device includes a substrate and a magnetic film on a surface of the substrate. The substrate has magnetic properties and is capable of generating magnetic field. The magnetic film partially covers the surface. The magnetic film generates a magnetic field having a direction that is opposite to a direction of the magnetic field generated by the substrate. Portions of the surface of the substrate not covered by the magnetic film form positions to attract and adsorb target objects, and other portion of the surface of the substrate covered by the magnetic film is not able to attract any target object.

A method of transferring a plurality of micro LEDs formed on a substrate including transferring the micro LEDs onto a first carrier substrate having a first adhesive material layer, reducing an adhesiveness of the first adhesive material layer by curing the first adhesive material layer, transferring the micro LEDs from the first carrier substrate onto a second carrier substrate having a second adhesive material layer, bonding at least a portion of the micro LEDs on the second carrier substrate to pads of a circuit board using a metal bonding layer, and separating the second carrier substrate from the micro LEDs bonded onto the circuit board.

A chip transfer assembly and a manufacturing method therefor, a chip transfer method, and a display backplane. The chip transfer assembly comprises a transfer substrate (1); a porous adhesive layer (2) formed on the transfer substrate, first pores (21) being distributed in the porous adhesive layer; and at least one colloid protrusions (3) formed on the porous adhesive layer, the colloid protrusions having light transmittance, and second pores (31) used for accommodating luminescent conversion particles (4) being distributed in the colloid protrusions; after an LED chip (7) is transferred to a chip soldering zone, the colloid protrusions separate from the porous adhesive layer and remain on the LED chip to form a luminescent conversion layer.

Provided is a manufacturing method of a semiconductor device comprising a semiconductor substrate which includes a first surface and a second surface which is on an opposite side of the first surface, the method comprising: a front surface processing for providing a first resist to the first surface of the semiconductor substrate and processing the first surface; a first protective film forming for forming a first protective film above the first surface of the semiconductor substrate; a second protective film forming for forming a second protective film above the first protective film, wherein a material of the second protective film is different from that of the first protective film; a back surface processing for processing the second surface of the semiconductor substrate; and a protective film removing for selectively removing the second protective film.

A display device includes a light emitting element, an adhesive barrier wall and an array substrate. The light emitting element includes a first contact and a second contact disposed on a first surface of the light emitting element. The adhesive barrier wall is disposed on the first surface of the light emitting element and includes a first portion between the first contact and the second contact. The array substrate includes a first pad and a second pad disposed on a second surface of the array substrate. The first contact and the second contact of the light emitting element are respectively connected to the first pad and the second pad.

A 3D semiconductor device including: a first level including a plurality of first single-crystal transistors; a plurality of memory control circuits formed from at least a portion of the plurality of first single-crystal transistors; a first metal layer disposed atop the plurality of first single-crystal transistors; a second metal layer disposed atop the first metal layer; a second level disposed atop the second metal layer, the second level including a plurality of second transistors; a third level including a plurality of third transistors, where the third level is disposed above the second level; a third metal layer disposed above the third level; and a fourth metal layer disposed above the third metal layer, where the plurality of second transistors are aligned to the plurality of first single crystal transistors with less than 140 nm alignment error, the second level includes first memory cells, the third level includes second memory cells.