A microelectronic assembly is provided comprising a first integrated circuit (IC) die having an electrical load circuit, a second IC die having a portion of a voltage regulator (VR), and a third IC die comprising inductors of the VR. The third IC die is between the first IC die and the second IC die, and the VR receives power at a first voltage and provides power at a second voltage to the electrical load circuit, the second voltage being lower than the first voltage. In various embodiments, the inductors in the third IC die comprise magnetic thin films. The third IC die may be a passive die without any active elements in some embodiments. In some embodiments, the microelectronic assembly further comprises a package substrate having conductive pathways, and the second IC die is between the third IC die and the package substrate.

A radio-frequency module includes a multilayer substrate, a first semiconductor device, a second semiconductor device, a first mold layer, and a second mold layer. The multilayer substrate includes a plurality of stacked layers, and has a first major face and a second major face. The first mold layer seals the first semiconductor device. The second mold layer seals the second semiconductor device. The first major face includes a first recess. The first semiconductor device is mounted over a bottom face of the first recess. The second semiconductor device is mounted over the first major face so as to overlie the first recess. The first semiconductor device is connected with a metallic via that extends through a portion of the multilayer substrate from the bottom face of the first recess to the second major face. The first mold layer and the second mold layer are made of different materials.

In some embodiments, a compensated power detector can include a power detector that includes a first detection cell having a bias input and an output, and a second detection cell having a signal input, a bias input and an output. The power detector can further include an error amplifier having a first input coupled to the output of the first detection cell, and a second input for receiving a reference voltage. The error amplifier can be configured to provide an output voltage to each of the bias inputs of the first and second detection cells, such that an output of the second detection cell is representative of power of a radio-frequency signal received at the signal input with an adjustment for one or more non-signal effects as measured by the first detection cell and the error amplifier.

In one example, an electronic device, comprises a first substrate comprising a first conductive structure, a second substrate comprising a second conductive structure, wherein the first substrate is over the second substrate, a first electronic component between the first substrate and the second substrate, a vertical interconnect between the first substrate and the second substrate, wherein the vertical interconnect is coupled with the first conductive structure and the second conductive structure, and an encapsulant between the first substrate and the second substrate and covering the vertical interconnect. A vertical port on the first electronic component is exposed by an aperture of the first substrate. Other examples and related methods are also disclosed herein.

Leadless power amplifier (PA) packages having topside termination interposer (TTI) arrangements, and associated fabrication methods, are disclosed. Embodiments of the leadless PA package include a base flange, a first set of interposer mount pads, a first RF power die, a package body. The first RF power die is attached to a die mount surface of the base flange and electrically interconnected with the first set of interposer mount pads. The TTI arrangement is electrically coupled to the first set of interposer mount pads and projects therefrom in the package height direction. The package body encloses the first RF power die and having a package topside surface opposite the lower flange surface. Topside input/output terminals of the PA package are accessible from the package topside surface and are electrically interconnected with the first RF power die through the TTI arrangement and the first set of interposer mount pads.

A semiconductor device includes at least one transistor, a plurality of input wires, and a plurality of output wires. The at least one transistor has a plurality of input pads arranged along one side of the at least one transistor and a plurality of output pads arranged along another side of the at least one transistor facing the one side. The plurality of input wires are respectively connected to the plurality of input pads. The plurality of output wires are respectively connected to the plurality of output pads and have longer wire lengths than the plurality of input wires. Adjacent input wires of the plurality of input wires are arranged parallel to each other, and adjacent output wires of the plurality of output wires are arranged non-parallel to each other.

Example embodiments relate to power amplifiers and Doherty amplifiers that include the same. One example embodiment includes a power amplifier. The power amplifier includes one or more radiofrequency (RF) output terminals. The power amplifier also includes a Gallium Nitride (GaN) semiconductor die on which a power field-effect transistor (FET) is integrated. The FET includes a plurality of FET cells that are adjacently arranged in a row. The FET cells are connected either directly or indirectly to the one or more RF output terminals via a respective first inductor. For FET cells arranged at opposing ends of the row of FET cells, a total FET cell gate width and an inductance of the first inductor is larger and smaller than the total FET cell gate width and inductance of the first inductor for one or more FET cells arranged in the middle of the row of FET cells, respectively.

A method of marking information on a substrate for use in a semiconductor component is provided. The method comprises providing a substrate for use in a semiconductor component, providing a metal layer on a surface of the substrate, and providing a marking within the metal layer. A method of making a die, a radio-frequency module and a wireless mobile device; as well as a substrate, a die, a radio-frequency module and a wireless mobile device is also provided.

A high frequency device includes a semiconductor chip including a semiconductor substrate, and an amplifier provided on a front surface of the semiconductor substrate and amplifying a high frequency signal, a first reference potential layer provided above the semiconductor chip in an upper direction perpendicular to the front surface of the semiconductor substrate, and provided so as to overlap with the semiconductor chip in a plan view from above, and to which a reference potential is supplied, and a resonator provided between the semiconductor chip and the first reference potential layer in the upper direction perpendicular to the front surface of the semiconductor substrate, wherein a resonance frequency of the resonator is included in an operating frequency band of the amplifier, and an impedance of the resonator becomes minimal at the resonance frequency.

A high-frequency package includes a radio wave shielding portion that shields radio waves radiated from a high-frequency component, a radio wave absorber that is arranged facing the high-frequency component and that absorbs the radio waves, and an adjusting means that enables adjustment of distance from the radio wave absorber to the high-frequency component by adjusting a position of the radio wave absorber with respect to the radio wave shielding portion.