Provided are capacitors of semiconductor devices, wherein the capacitors may be used in a high-frequency operation environment. A capacitor includes a first electrode layer, a dielectric layer on the first electrode layer, and a second electrode layer on the dielectric layer, wherein the dielectric layer includes a plurality of unit dielectric layers, and the unit dielectric layer includes first and second sub-dielectric layers that have different dielectric constants and conductivities from each other and are connected in series, and the first and second sub-dielectric layers have a conductivity difference so that the capacitance of the dielectric layer converges to the capacitance of the unit dielectric layer.

A method of manufacturing a high-frequency device includes mounting a first chip having a first pillar on an upper surface thereof on a metal base, forming an insulator layer covering the first chip on the metal base, exposing an upper surface of the first pillar from the insulator layer, and forming a first wiring connected to the first pillar on the insulator layer and transmitting a high-frequency signal.

An electronic assembly has a host wafer having a first circuit including passive devices for the purpose of one of tuning or matching networks. Chiplets are placed in the cavities. At least one chiplet has a second circuit including at least one transistor or switch device and passive tuning circuits including at least one of a stabilization network, a gain boosting network, a power delivery network, or a low-noise network. Electrical interconnects between the chiplets and wafer electrically connect the first circuitry to the second circuitry.

An integrated circuit (IC) includes a first switch, a second switch, and an amplifier electrically connected between the first switch and the second switch. An RF signal path passes through first switch, the amplifier, and the second switch in this order. The IC includes an input terminal and an output terminal that are to be connected to each other between the first switch and the amplifier or between the amplifier and the second switch outside of the IC with a component connected therebetween. In a top view of the IC, a first region of the first switch, a second region of the amplifier, and a third region of the second switch are disposed on a straight line such that a virtual straight line connects any point of the first region, any point of the second region, and any point of the second region in this order.

An RF flip chip is provided in which a local bump region adjacent a die corner includes a balun having a centrally-located bump.

Mobile phones and other mobile devices communicate wirelessly by transmitting and receiving RF signals. Transmitters and receivers in wireless devices process RF signals in certain frequency ranges or bands. Signals in other frequencies can be blocked or filtered out by, for example, a lumped-element circuit or a lumped-element filter consisting of passive electrical components such as inductors, capacitors, and resistors. A passive component device, or integrated passive device, is one example of a lumped-element filter fabricated with passive components on a die. In a mobile device, a passive component device and one or more integrated circuits or other chips used for signal processing are interconnected by being mounted on (i.e., coupled to) a metallization structure or package substrate in a chip module or multi-chip module. The demand for miniaturization of hand-held mobile devices drives a need for reducing the sizes of chip modules that are inside a mobile device.

Provided is an electronic part that includes a first substrate including a first base and a first coil, the first coil being electrically insulated from the first base, a second substrate including a second base and a second coil, the second coil being electrically insulated from the second base, and a support member that supports the first substrate and the second substrate. The first substrate is arranged between the second substrate and the support member in a thickness direction of the support member and overlaps the second substrate as viewed in the thickness direction, the first base is positioned between the first coil and the second coil in the thickness direction, and the first coil and the second coil are magnetically coupled.

A power transistor die includes a semiconductor die with input and output die sides, and a transistor integrally formed in the semiconductor die between the input die side and the output die side, where the transistor has an input and an output (e.g., a gate and a drain, respectively). The power transistor die also includes an input bondpad and a first output bondpad integrally formed in the semiconductor die between the input die side and the transistor. The input bondpad is electrically connected to the input of the transistor. A conductive structure directly electrically connects the output of the transistor to the first output bondpad. A second output bondpad, which also may be directly electrically connected to the transistor output, may be integrally formed in the semiconductor die between the transistor and the output die side.

Embodiments of the invention include an electrical package and methods of forming the package. In one embodiment, a transformer may be formed in the electrical package. The transformer may include a first conductive loop that is formed over a first dielectric layer. A thin dielectric spacer material may be used to separate the first conductive loop from a second conductive loop that is formed in the package. Additional embodiments of the invention include forming a capacitor formed in the electrical package. For example, the capacitor may include a first capacitor plate that is formed over a first dielectric layer. A thin dielectric spacer material may be used to separate the first capacitor plate form a second capacitor plate that is formed in the package. The thin dielectric spacer material in the transformer and capacitor allow for increased coupling factors and capacitance density in electrical components.

A multiple-path amplifier (e.g., a Doherty amplifier) includes a semiconductor die, a radio frequency (RF) signal input terminal, a combining node structure integrally formed with the semiconductor die, and first and second amplifiers (e.g., main and peaking amplifiers) integrally formed with the die. Inputs of the first and second amplifiers are electrically coupled to the RF signal input terminal. A plurality of wirebonds is connected between an output of the first amplifier and the combining node structure. An output of the second amplifier is electrically coupled to the combining node structure (e.g., through a conductive path with a negligible phase delay). A phase delay between the outputs of the first and second amplifiers is substantially equal to 90 degrees. The second amplifier may be divided into two amplifier portions that are physically located on opposite sides of the first amplifier.