H01L2924/1203

Electronic component
09741635 · 2017-08-22 · ·

An electronic component includes one or more semiconductor dice embedded in a first dielectric layer, means for a spreading heat in directions substantially parallel to a major surface of the one or more semiconductor dice embedded in a second dielectric layer and means for dissipating heat in directions substantially perpendicular to the major surface of the one or more semiconductor dice.

Power semiconductor device and power conversion device

A semiconductor module includes a first power semiconductor element having a first surface and a second surface. The semiconductor module also includes a second power semiconductor element having a first surface and a second surface. The semiconductor module also includes first, second, third, and fourth conductor plates, and a connecting part. The connecting part is integrally formed with the second conductor plate, extends toward the third conductor plate, and is connected to the third conductor plate.

POWER MODULE AND FABRICATION METHOD OF THE SAME, GRAPHITE PLATE, AND POWER SUPPLY EQUIPMENT

A power module (PM) includes: an insulating substrate; a semiconductor device disposed on the insulating substrate, the semiconductor device including electrodes on a front surface side and a back surface side thereof; and a graphite plate having an anisotropic thermal conductivity, the graphite plate of which one end is connected to the front surface side of the semiconductor device and the other end is connected to the insulating substrate, wherein heat of the front surface side of the semiconductor device is transferred to the insulating substrate through the graphite plate. There is provide an inexpensive power module capable of reducing a stress and capable of exhibiting cooling performance not inferior to that of the double-sided cooling structures.

SEMICONDUCTOR MODULE MANUFACTURING METHOD AND SEMICONDUCTOR MODULE
20170236782 · 2017-08-17 · ·

A semiconductor module manufacturing method, including preparing an external terminal that is of a pin shape and that has an outflow prevention portion formed on an outer surface portion thereof, attaching the external terminal to a substrate and electrically connecting the external terminal to the substrate, preparing a transfer molding die including a first mold portion and a second mold portion, which are combinable by attaching a parting surface of the first mold portion to a parting surface of the second mold portion, to thereby form a first cavity and a second cavity that are in communication with each other, combining the first and second mold portions to accommodate the substrate and the external terminal respectively in the first and second cavities, and to sandwich the outflow prevention portion between the first and second mold portions, and encapsulating the substrate by injecting resin into the first cavity.

SEMICONDUCTOR MODULE MANUFACTURING METHOD AND SEMICONDUCTOR MODULE
20170236782 · 2017-08-17 · ·

A semiconductor module manufacturing method, including preparing an external terminal that is of a pin shape and that has an outflow prevention portion formed on an outer surface portion thereof, attaching the external terminal to a substrate and electrically connecting the external terminal to the substrate, preparing a transfer molding die including a first mold portion and a second mold portion, which are combinable by attaching a parting surface of the first mold portion to a parting surface of the second mold portion, to thereby form a first cavity and a second cavity that are in communication with each other, combining the first and second mold portions to accommodate the substrate and the external terminal respectively in the first and second cavities, and to sandwich the outflow prevention portion between the first and second mold portions, and encapsulating the substrate by injecting resin into the first cavity.

SEMICONDUCTOR DEVICE, POWER CONVERSION DEVICE, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

A semiconductor device includes a semiconductor module, an insulating resin layer, a frame member, and a heat sink. Insulating resin layer is bonded to semiconductor module and contains a first resin. Frame member is disposed to surround insulating resin layer, and includes a porous material. Heat sink and semiconductor module sandwich insulating resin layer and frame member. Frame member is compressed while being sandwiched between semiconductor module and heat sink. Insulating resin layer is filled in a region surrounded by semiconductor module, heat sink, and frame member. The first resin enters pores of the porous material.

Electrostatic discharge protection for a balun

A die is mounted in an integrated circuit package. The die includes a balun circuit and an electrostatic discharge (ESD) circuit coupled to a ground of the integrated circuit die. The package has a first output pin coupled to a first terminal of the balun and has a second output pin coupled to a second terminal of the balun through first and second bond wires. The second output pin is connected to board ground. A third bond wire is disposed between the second package terminal and the ESD circuit to provide a safe discharge path through the third bond wire for ESD events affecting the first and second output terminals. Thus, a charge that builds up involving one of the output terminals coupled to the balun can be safely dissipated.

SEMICONDUCTOR DEVICE AND ELECTRONIC APPARATUS
20170229428 · 2017-08-10 ·

For example, a semiconductor device capable of achieving a high performance applicable to an SR motor is provided. The semiconductor device includes a chip mounting portion TAB1 on which a semiconductor chip CHP1 having an IGBT is mounted, and a chip mounting portion TAB2 on which a semiconductor chip CHP2 having a diode is formed. The semiconductor device also includes a lead LD1A electrically connected to an emitter electrode pad EP of the semiconductor chip CHP1 via a clip CLP1, and a lead LD1B electrically connected to an anode electrode pad ADP of the semiconductor chip CHP2 via a clip CLP2. At this time, the chip mounting portion TAB1 is separated electrically from the chip mounting portion TAB2, and the clip CLP1 is separated electrically from the clip CLP2.

POWER SEMICONDUCTOR DEVICE LOAD TERMINAL

A power semiconductor device, a power semiconductor module and a power semiconductor device processing method are provided. The power semiconductor device includes a first load terminal structure, a second load terminal structure, and a semiconductor structure electrically coupled to each load terminal structure and configured to carry a load current. The first load terminal structure includes a conductive layer in contact with the semiconductor structure, a bonding block configured to be contacted by at least one bond wire and to receive at least a part of the load current from the at least one bond wire and/or the conductive layer, a support block having a hardness greater than the hardness of the conductive layer and the bonding block. The bonding block is mounted on the conductive layer via the support block, and a zone is arranged within the conductive layer and/or the bonding block, the zone exhibiting nitrogen atoms.

POWER SEMICONDUCTOR DEVICE LOAD TERMINAL

A power semiconductor device, a power semiconductor module and a power semiconductor device processing method are provided. The power semiconductor device includes a first load terminal structure, a second load terminal structure, and a semiconductor structure electrically coupled to each load terminal structure and configured to carry a load current. The first load terminal structure includes a conductive layer in contact with the semiconductor structure, a bonding block configured to be contacted by at least one bond wire and to receive at least a part of the load current from the at least one bond wire and/or the conductive layer, a support block having a hardness greater than the hardness of the conductive layer and the bonding block. The bonding block is mounted on the conductive layer via the support block, and a zone is arranged within the conductive layer and/or the bonding block, the zone exhibiting nitrogen atoms.