A power conversion device includes first and second power semiconductor elements, and a circuit for transferring a drive signal of the first and second power semiconductor elements. The circuit board includes a first emitter wire which is formed along an arranging direction of the first power semiconductor element and the second power semiconductor element, a first gate wire which is disposed between the first power semiconductor element and the first emitter wire, a second gate wire which is disposed between the second power semiconductor element and the emitter wire, a third gate wire which is disposed to face the first gate wire and the second gate wire with the emitter wire interposed between the third gate wire and the first gate wire and the second gate wire, and a first gate resistor which connects the first gate wire and the third gate wire over the first emitter wire.

An embodiment is a method including forming a first passive device in a first wafer, forming a first dielectric layer over a first side of the first wafer, forming a first plurality of bond pads in the first dielectric layer, planarizing the first dielectric layer and the first plurality of bond pads to level top surfaces of the first dielectric layer and the first plurality of bond pads with each other, hybrid bonding a first device die to the first dielectric layer and at least some of the first plurality of bond pads, and encapsulating the first device die in a first encapsulant.

A method of manufacturing an electronic device comprising the steps of: preparing a substrate comprising an electrically conductive layer; applying a conductive paste on the electrically conductive layer; mounting an electrical component on the applied conductive paste; heating the conductive paste to bond the electrically conductive layer and the electrical component, wherein the conductive paste comprises 100 parts by weight of the metal powder, 5 to 20 parts by weight of a solvent, and 0.05 to 3 parts by weight of a polymer, wherein the polymer comprises a first polymer and a second polymer, wherein the molecular weight (Mw) of the first polymer is 5,000 to 95,000, and the molecular weight (Mw) of the second polymer is 100,000 to 300,000.

The present disclosure relates to a radio frequency (RF) device that includes a mold device die and a multilayer redistribution structure underneath the mold device die. The mold device die includes a device region with a back-end-of-line (BEOL) portion and a front-end-of-line (FEOL) portion over the BEOL portion, and a first mold compound. The FEOL portion includes an active layer, a contact layer, and isolation sections. Herein, the active layer and the isolation sections reside over the contact layer, and the active layer is surrounded by the isolation sections. The first mold compound resides over the active layer without silicon crystal, which has no germanium content, in between. The multilayer redistribution structure includes redistribution interconnections and a number of bump structures that are at bottom of the multilayer redistribution structure and electrically coupled to the mold device die via the redistribution interconnections.

The present disclosure relates to a radio frequency device that includes a mold device die and a multilayer redistribution structure underneath the mold device die. The mold device die includes a device region with a back-end-of-line (BEOL) portion and a front-end-of-line (FEOL) portion over the BEOL portion, a barrier layer, and a first mold compound. The FEOL portion includes isolation sections and an active layer surrounded by the isolation sections. The barrier layer formed of silicon nitride resides over the active layer and top surfaces of the isolation sections. The first mold compound resides over the barrier layer. Herein, silicon crystal does not exist between the first mold compound and the active layer. The multilayer redistribution structure includes a number of bump structures, which are at a bottom of the multilayer redistribution structure and electrically coupled to the FEOL portion of the mold device die.

A microelectronic device includes a metal layer on a first dielectric layer. An etch stop layer is disposed over the metal layer and on the dielectric layer directly adjacent to the metal layer. The etch stop layer includes a metal oxide, and is less than 10 nanometers thick. A second dielectric layer is disposed over the etch stop layer. The second dielectric layer is removed from an etched region which extends down to the etch stop layer. The etched region extends at least partially over the metal layer. In one version of the microelectronic device, the etch stop layer may extend over the metal layer in the etched region. In another version, the etch stop layer may be removed in the etched region. The microelectronic device is formed by etching the second dielectric layer using a plasma etch process, stopping on the etch stop layer.

The present invention relates to a conductive paste for bonding comprising 100 parts by weight of the metal powder, 5 to 20 parts by weight of a solvent, and 0.05 to 3 parts by weight of a polymer, wherein the polymer comprises a first polymer and a second polymer, wherein the molecular weight (Mw) of the first polymer is 5,000 to 95,000, and the molecular weight (Mw) of the second polymer is 100,000 to 300,000.

Various embodiments of an integrated circuit package and a method of forming such package are disclosed. The package includes a substrate having a glass core layer, where the glass core layer includes a first major surface, a second major surface, and a cavity disposed between the first major surface and the second major surface of the glass core layer. The package also includes a die disposed in the cavity of the glass core layer, an encapsulant disposed in the cavity between the die and a sidewall of the cavity, a first patterned conductive layer disposed adjacent the first major surface of the glass core layer, and a second patterned conductive layer disposed adjacent the second major surface of the glass core layer. The die is electrically connected to at least one of the first and second patterned conductive layers.

A method of manufacturing a semiconductor device structure includes forming a bond or joint between a first device and a second device. The first device comprises an integrated passive device (IPD) and a first contact pad disposed over the IPD. The second device comprises a second contact pad. The first contact pad has a first surface with first lateral extents. The second contact pad has a second surface with second lateral extents. The width of the second lateral extents is less than the width of the first lateral extents. The joint structure includes the first contact pad, the second contact pad, and a solder layer interposed therebetween. The solder layer has tapered sidewalls extending in a direction away from the first surface of the first contact pad to the second surface of the second contact pad. At least one of the first surface or the second surface is substantially planar.

A method of manufacturing a semiconductor device structure includes forming a bond or joint between a first device and a second device. The first device comprises an integrated passive device (IPD) and a first contact pad disposed over the IPD. The second device comprises a second contact pad. The first contact pad has a first surface with first lateral extents. The second contact pad has a second surface with second lateral extents. The width of the second lateral extents is less than the width of the first lateral extents. The joint structure includes the first contact pad, the second contact pad, and a solder layer interposed therebetween. The solder layer has tapered sidewalls extending in a direction away from the first surface of the first contact pad to the second surface of the second contact pad. At least one of the first surface or the second surface is substantially planar.