An electronic component module according to an embodiment includes a substrate, an electronic component, and a connection device. The substrate includes an electrode array. The electronic component includes an electrode array. The connection device that includes a plurality of post parts including respective conductive parts and a base for supporting the plurality of post parts. The connection device is interposed between the substrate and the electronic component, and is configured in a manner that the conductive parts electrically connect the electrode array of the substrate and the electrode array of the electronic component to each other via solder.

A semiconductor module of the present disclosure includes: a base body including a groove part of which two inner side surfaces are inclined, the base body including an electrode pad which is provided on at least one inner side surface; and a semiconductor element including a semiconductor substrate including a first surface, a second surface opposite to the first surface, and two side surfaces which are inclined in a diagonal direction to the first surface and are opposite to each other, a semiconductor layer located on the first surface, and an electrode disposed on at least one side surface. The semiconductor element is located in the groove part so that the at least one side surface is disposed along the at least one inner side surface of the base body, and at least one electrode of the semiconductor element is connected to the electrode pad of the base body.

Electronic device shape configuration technology is disclosed. In an example, an electronic device substrate is provided that can comprise a top surface, and a bottom surface opposing the top surface. The top surface and/or the bottom surface can have a non-rectangular shaped perimeter. An electronic device die is also provided that can comprise a top surface, and a bottom surface opposing the top surface. The top surface and/or the bottom surface can have a non-rectangular shaped perimeter. In addition, an electronic device package is provided that can comprise a substrate having a top surface configured to receive a die and a bottom surface opposing the top surface. The package can also include a die having a top surface and a bottom surface opposing the top surface. The die can be coupled to the top surface of the substrate. The top surface and/or the bottom surface of either the substrate, or the die, or both can have a non-rectangular shaped perimeter.

A semiconductor module of the present disclosure includes: a base body including a groove part of which two inner side surfaces are inclined, the base body including an electrode pad which is provided on at least one inner side surface; and a semiconductor element including a semiconductor substrate including a first surface, a second surface opposite to the first surface, and two side surfaces which are inclined in a diagonal direction to the first surface and are opposite to each other, a semiconductor layer located on the first surface, and an electrode disposed on at least one side surface. The semiconductor element is located in the groove part so that the at least one side surface is disposed along the at least one inner side surface of the base body, and at least one electrode of the semiconductor element is connected to the electrode pad of the base body.

A semiconductor package comprising a package substrate that has a recessed portion on a top surface thereof, a lower semiconductor chip in the recessed portion of the package substrate, an upper semiconductor chip on the lower semiconductor chip and the package substrate and having a width greater than that of the lower semiconductor chip, a plurality of first bumps directly between the package substrate and the upper semiconductor chip, and a plurality of second bumps directly between the lower semiconductor chip and the upper semiconductor chip. A pitch of the second bumps is less than that of the first bumps.

A fingerprint sensing unit includes a carrier substrate, a fingerprint sensing chip on an upper surface of the carrier substrate, a molding layer, a light-pervious cover layer on the molding layer, and an adhesive layer between the light-pervious cover layer and the molding layer. The fingerprint sensing chip is electrically connected to the carrier substrate. The molding layer covers the fingerprint sensing chip.

Electronic device shape configuration technology is disclosed. In an example, an electronic device substrate is provided that can comprise a top surface, and a bottom surface opposing the top surface. The top surface and/or the bottom surface can have a non-rectangular shaped perimeter. An electronic device die is also provided that can comprise a top surface, and a bottom surface opposing the top surface. The top surface and/or the bottom surface can have a non-rectangular shaped perimeter. In addition, an electronic device package is provided that can comprise a substrate having a top surface configured to receive a die and a bottom surface opposing the top surface. The package can also include a die having a top surface and a bottom surface opposing the top surface. The die can be coupled to the top surface of the substrate. The top surface and/or the bottom surface of either the substrate, or the die, or both can have a non-rectangular shaped perimeter.

A semiconductor package comprising a package substrate that has a recessed portion on a top surface thereof, a lower semiconductor chip in the recessed portion of the package substrate, an upper semiconductor chip on the lower semiconductor chip and the package substrate and having a width greater than that of the lower semiconductor chip, a plurality of first bumps directly between the package substrate and the upper semiconductor chip, and a plurality of second bumps directly between the lower semiconductor chip and the upper semiconductor chip. A pitch of the second bumps is less than that of the first bumps.

A fingerprint sensing unit includes a carrier substrate, a fingerprint sensing chip on an upper surface of the carrier substrate, a molding layer, a light-pervious cover layer on the molding layer, and an adhesive layer between the light-pervious cover layer and the molding layer. The fingerprint sensing chip is electrically connected to the carrier substrate. The molding layer covers the fingerprint sensing chip.

A system-in-package apparatus includes a package substrate configured to carry at least one semiconductive device on a die side and a package bottom interposer disposed on the package substrate on a land side. A land side board mates with the package bottom interposer, and enough vertical space is created by the package bottom interposer to allow space for at least one device disposed on the package substrate on the land side.