Aspects of the present disclosure relate to determining a layout of a racetrack that forms part of an RF isolation structure of a packaged module and the resulting RF isolation structures. Locations of where the racetrack can be adjusted (for example, narrowed) and/or removed without significantly degrading the EMI performance of the RF isolation structure can be identified. In certain embodiments, a portion of the racetrack can be removed to create a break and/or a portion of the racetrack can be narrowed in a selected area.

Disclosed are devices and methods related to a conductive paint layer configured to provide radio-frequency (RF) shielding for a packaged semiconductor module. Such a module can include a packaging substrate, one or more RF components mounted on the packaging substrate, a ground plane disposed within the packaging substrate, and a plurality of RF-shielding wirebonds disposed on the packaging substrate and electrically connected to the ground plane. The module can further include an overmold structure formed over the packaging substrate and dimensioned to substantially encapsulate the RF component(s) and the RF-shielding wirebonds. The overmold structure can define an upper surface that exposes upper portions of the RF-shielding wirebonds. The module can further include a conductive paint layer having silver flakes disposed on the upper surface of the overmold structure so that the conductive paint layer, the RF-shielding wirebonds, and the ground plane form an RF-shield for the RF component(s).

Aspects of the present disclosure relate to a packaged module with a radio frequency isolation structure that includes a racetrack, a conductive layer, and a conductive feature in an electrical path between the racetrack and the conductive layer. The racetrack can be disposed in a substrate and configured at a ground potential. The racetrack can include a break.

A packaged device (110) includes a substrate (114) and one or more contacts (118) disposed on a side of the substrate (114). Structures of the packaged device (110) define at least in part a recess region (120) that extends from the side of the substrate (114) and through the substrate (114), where one or more contacts (124) of a second hardware interface are disposed in the recess region (120). The one or more contacts (118) of the first hardware interface enable connection of the packaged device (110) to a printed circuit board. The one or more contacts (124) of the second hardware interface enable connection between one or more IC dies of the packaged device (110) and another IC die (150) that is a component of the packaged device (110) or of a different packaged device.

An integrated fan-out package includes an integrated circuit, a plurality of semiconductor devices, a first redistribution circuit structure, and an insulating encapsulation. The integrated circuit has an active surface and a rear surface opposite to the active surface. The semiconductor devices are electrically connected the integrated circuit. The first redistribution circuit structure is disposed between the integrated circuit and the semiconductor devices. The first redistribution circuit structure is electrically connected to the integrated circuit and the semiconductor devices respectively. The first redistribution circuit structure has a first surface, a second surface opposite to the first surface, and lateral sides between the first surface and the second surface. The insulating encapsulation encapsulates the integrated circuit and the semiconductor devices and covers the first surface and the second surface of the first redistribution circuit structure. Furthermore, methods for fabricating the integrated fan-out package are also provided.

An electronic substrate or interposer comprising nanoporous films, such as anodic aluminum oxide, containing vertically etched openings (vias) that are filled with a conductive material, forming a high density collection of vertically oriented vias that conduct electricity from one side of the substrate to the other.

A packaged device (110) includes a substrate (114) and one or more contacts (118) disposed on a side of the substrate (114). Structures of the packaged device (110) define at least in part a recess region (120) that extends from the side of the substrate (114) and through the substrate (114), where one or more contacts (124) of a second hardware interface are disposed in the recess region (120). The one or more contacts (118) of the first hardware interface enable connection of the packaged device (110) to a printed circuit board. The one or more contacts (124) of the second hardware interface enable connection between one or more IC dies of the packaged device (110) and another IC die (150) that is a component of the packaged device (110) or of a different packaged device.

Techniques and mechanisms to facilitate connection with one or more integrated circuit (IC) dies of a packaged device. In an embodiment, the packaged device includes a first substrate coupled to a first side of a package, and a second substrate coupled to a second side of the package opposite the first side. Circuitry, coupled via the first substrate to one or more IC dies disposed in the package, includes a circuit structure disposed at a cantilever portion of the first substrate. The cantilever portion extends past one or both of an edge of the first side and an edge of the second side. In another embodiment, a hardware interface disposed on the second substrate enables coupling of the packaged device to another device.

A substrate comprises: a first insulating layer; a second insulating layer having an elastic modulus that is different from an elastic modulus of the first insulating layer; and a core layer that is sandwiched by the first insulating layer and the second insulating layer, and is more rigid than the first insulating layer and the second insulating layer.

An integrated fan-out package includes an integrated circuit, a plurality of semiconductor devices, a first redistribution circuit structure, and an insulating encapsulation. The integrated circuit has an active surface and a rear surface opposite to the active surface. The semiconductor devices are electrically connected the integrated circuit. The first redistribution circuit structure is disposed between the integrated circuit and the semiconductor devices. The first redistribution circuit structure is electrically connected to the integrated circuit and the semiconductor devices respectively. The first redistribution circuit structure has a first surface, a second surface opposite to the first surface, and lateral sides between the first surface and the second surface. The insulating encapsulation encapsulates the integrated circuit and the semiconductor devices and covers the first surface and the second surface of the first redistribution circuit structure. Furthermore, methods for fabricating the integrated fan-out package are also provided.