A semiconductor device disclosed in an embodiment comprises: a light emitting unit comprising a light emitting structure layer which has a first conductivity type semiconductor layer, a second conductivity type semiconductor layer, and an active layer between the first conductivity type semiconductor layer and the second conductivity type semiconductor layer; and a sensor unit disposed on the light emitting unit, wherein the sensor unit comprises: a sensing material changing in resistance with light emitted by the light emitting unit; a first sensor electrode comprising a first pad portion and a first extension part extending from the first pad portion and contacting the sensing material; and a second sensor electrode comprising a first pad portion and a second extension part extending toward the first extension part from the second pad portion and contacting the sensing material. The sensor unit senses an external gas in response to the light generated from the light emitting unit.

A biological information detecting apparatus includes: an LC resonant pressure sensor including a resonant circuit including a capacitor and an inductor, and having a resonant frequency that changes depending on a change in external pressure applied to the capacitor; and an integrated circuit (IC) chip package including a coil type antenna radiating a radio frequency (RF) signal within a preset frequency band, wherein a change in the resonant frequency results in a change in a power transmission rate depending on a inductive coupling between the resonant frequency and a frequency of the RF signal. The IC chip package includes the coil type antenna disposed in a region overlapping the LC resonant pressure sensor in a plan view of the IC chip package.

Embodiments of the present disclosure describe a die with integrated microphone device using through-silicon vias (TSVs) and associated techniques and configurations. In one embodiment, an apparatus includes an apparatus comprising a semiconductor substrate having a first side and a second side disposed opposite to the first side, an interconnect layer formed on the first side of the semiconductor substrate, a through-silicon via (TSV) formed through the semiconductor substrate and configured to route electrical signals between the first side of the semiconductor substrate and the second side of the semiconductor substrate, and a microphone device formed on the second side of the semiconductor substrate and electrically coupled with the TSV. Other embodiments may be described and/or claimed.

A semiconductor package includes a substrate, an integrated circuit disposed on the substrate, a memory support disposed on the integrated circuit, stacked memory disposed on the memory support and in communication with the integrated circuit, and a lid connected to the substrate. The integrated circuit has a low power region and a high power region. The memory support is disposed on the low power region of the integrated circuit and is configured to allow a flow of fluid therethrough to conduct heat away from the low power region of the integrated circuit. The lid defines a first port, a second port, and a lid volume fluidly connecting the first port and the second port. The lid volume is configured to house the integrated circuit, the memory support, and the stacked memory, while directing the flow of fluid to flow over the integrated circuit, the memory support, and the stacked memory.

A package packaged with a cap. The package features trenches, through holes, and a non-conductive coupling element forming a locking mechanism integrated embedded or integrated within a substrate. The package has a cap coupled to the non-conductive coupling element through ultrasonic plastic welding. The package protects the dice from an outside environment or external stresses or both. A method is desired to form package to reduce glue overflow defects in the package. Fabrication of the package comprises drilling holes in a substrate; forming trenches in the substrate; forming a non-conductive coupling element in the through holes and the trenches to form a locking mechanism; allowing the non-conductive coupling element to harden and cure; coupling a die or dice to the substrate; and coupling a cap to the non-conductive coupling element to protect the die or dice from an outside environment or external stresses or both.

A chip package may include: a first die; at least one second die disposed over the first die; and a lid disposed over lateral portions of the first die and at least partially surrounding the at least one second die, the lid having inclined sidewalls spaced apart from and facing the at least one second die.

A chip-scale package for an edge-emitting semiconductor device and a semiconductor device assembly including such a chip-scale package are provided. The chip-scale package includes an edge-emitting semiconductor device chip, a top submount disposed on a top surface of the chip, and a bottom submount disposed on a bottom surface of the chip. The top-submount area and the bottom-submount area are each greater than the chip area and less than or equal to about 1.2 times the chip area.

The present invention relates to a gas sensor package including an insulating substrate, a metal layer on one surface of the insulating substrate, a stepped portion disposed on the metal layer and configured to divide the metal layer into a plurality of portions, and a gas sensor chip mounted on the metal layer located on the stepped portion and including a sensing part, wherein a width of the stepped portion is provided to be equal to or less than an interval between two adjacent electrode terminals of a plurality of electrode terminals of the gas sensor chip.

A semiconductor device with enhanced interposer quality, and method of manufacturing thereof. For example and without limitation, various aspects of the present disclosure provide an interposer die that comprises a first signal distribution structure comprising at least a first dielectric layer and a first conductive layer, wherein the signal distribution structure is protected at lateral edges by a protective layer. Also for example, various aspects of the present disclosure provide a method of manufacturing a semiconductor device comprising such an interposer die.

A semiconductor package is disclosed for efficiently facilitating heat dissipation. The semiconductor package includes a substrate layer, a chip, a housing lid and thermal-conductive liquid. A chip is disposed on the substrate layer and electrically coupled to the substrate layer. The chip includes at least one through silicon via (TSV). The housing lid is disposed above both the substrate layer and the chip. Also, the housing lid is coupled to the substrate layer at its edge for forming an internal space that encompasses the chip. The thermal-conductive liquid is filled within the internal space.