A device (2) is formed on a main surface of a semiconductor substrate (1). A passivation film (5) covers the main surface. A metallized pattern (6) is formed on the passivation film (5) and surrounds the device (2). A sealing metal layer (7) is formed on the metallized pattern (6) and includes a corner portion (10) in a planar view. A lid (8) is bonded to the metallized pattern (6) with the sealing metal layer (7) interposed therebetween and vacuum-seals the device (2). A dummy wiring (11) is softer than the metallized pattern (6), is formed at least between an outer portion of the corner portion of the sealing metal layer (7) and the semiconductor substrate (1), and does not electrically connected to the device (2).

A chip package assembly and method for fabricating the same are provided which utilize a plurality of extra-die heat transfer posts for improved thermal management. In one example, a chip package assembly is provided that includes a first integrated circuit (IC) die mounted to a substrate, a cover disposed over the first IC die, and a plurality of extra-die conductive posts disposed between the cover and substrate. The extra-die conductive posts provide a heat transfer path between the cover and substrate that is laterally outward of the first IC die.

Provided is a package structure, including a substrate, a chip on the substrate in a flip-chip manner, the chip including a circuit layer, and a side heat dissipator on a side of the chip, the side heat dissipator comprising a heat conduction material, wherein the side heat dissipator is electrically connected to the circuit layer.

A semiconductor package and a method of forming the same are provided. The semiconductor package includes a package substrate and a semiconductor device mounted on the surface of the package substrate. A first ring is disposed over the surface of the package substrate and surrounds the semiconductor device. A second ring is disposed over the top surface of the first ring. Also, a protruding part and a matching recessed part are formed on the top surface of the first ring and the bottom surface of the second ring, respectively. The protruding part extends into and engages with the recessed part to connect the first ring and the second ring. An adhesive layer is disposed between the surface of the package substrate and the bottom surface of the first ring for attaching the first ring and the overlying second ring to the package substrate.

Disclosed herein are microelectronic assemblies, as well as related apparatuses and methods. In some embodiments, a microelectronic assembly may include a substrate; a lid surrounding an individual die, wherein the lid includes a planar portion and two or more sides extending from the planar portion, and wherein the individual die is electrically coupled to the substrate by interconnects; and a material surrounding the interconnects and coupling the two or more sides of the lid to the substrate.

A bonding method and a bonding structure are provided. A device substrate is provided including a plurality of semiconductor devices, wherein each of the semiconductor devices includes a first bonding layer. A cap substrate is provided including a plurality of cap structures, wherein each of the cap structures includes a second bonding layer, the second bonding layer having a planar surface and a first protrusion protruding from the planar surface. The device substrate is bonded to the cap substrate by engaging the first protrusion of the second bonding layer of each of the cap structures with the corresponding first bonding layer of each of the semiconductor devices in the device substrate.

The disclosure describes a lidded flip chip package allowing for a thermal interface material (TIM) with fluidity, like a liquid metal, including: a lid, a sealing ring for forming a sealed gap between a flip chip and the lid, a storage tunnel as a reservoir for accepting or releasing a liquid metal from or to the sealed gap, and an injection tunnel for filling a liquid metal into the sealed gap, wherein a self-sealing plug structure is integrated with the storage tunnel and the injection tunnel, the sealed gap is completely filled with a liquid metal, and a portion of the storage tunnel is filled with the same liquid metal and its remaining portion is filled with a gas. The disclosure also describes a method for filling a liquid metal into the lidded flip chip package based on the self-sealing plug structure.

A semiconductor package is disclosed. The package includes a package substrate having top and bottom major package substrate surfaces, the top major package surface including a die region. A die having first and second major die surfaces is attached onto the die region. The second major die surface is attached to the die region. The first major die surface includes a sensor region and a cover adhesive region surrounding the sensor region. The package also includes applying a cover adhesive to the cover adhesive region on the first major die surface. A protective cover with first and second major cover surfaces and side surfaces is attached to the die using the cover adhesive. The second major cover surface contacts the cover adhesive. The protective cover covers the sensor region. The protective cover includes a recessed structure on the second major cover surface. The recessed structure is located above die bond pads on the die to create an elevated space over peak portions of wire bonds on the die bond pads. An encapsulant is disposed on the package substrate to cover exposed portions of the package substrate, die and bond wires and side surfaces of the protective cover, while leaving the first major cover surface exposed.

A method includes: providing a package body including a mounting part having a chip mounting region for mounting a semiconductor chip, a side wall part having a first sealing surface continuously provided over an entire perimeter of the mounting part, surrounding the chip mounting region and provided on the mounting part, a first recess provided on the first sealing surface, and a first solder outflow prevention part continuously provided on the first sealing surface and positioned closer to the chip mounting region side than the first recess; providing a cap having a second sealing surface facing the first sealing surface; providing a ball solder made of an alloy of gold and tin as principal ingredients; placing the ball solder in the first recess; placing the cap on the ball solder; and melting once and then solidifying the ball solder to bond the first sealing surface and the second sealing surface.

A semiconductor structure includes a circuit substrate, a semiconductor die, and a cover. The semiconductor die is disposed on the circuit substrate. The cover is disposed over the semiconductor die and over the circuit substrate. The cover comprises a lid portion and a support portion. The structure includes a first adhesive bonding the support portion to the circuit substrate and a second adhesive bonding the support portion and the lid portion.