The present technology relates to a solid-state image pickup device, a manufacturing method thereof, and an electronic apparatus that make it possible to increase the yield. The solid-state image pickup device includes an optical sensor including a light receiving unit and a cover glass provided on the light receiving unit's side of the optical sensor. The cover glass includes a chamfered portion at a ridge portion that surrounds a surface on the optical sensor's side. The present technology can be applied to, for example, a package for a CMOS image sensor.

An electronic component housing package includes an insulating substrate having an upper surface including a mount for an electronic component, a frame-shaped metallized layer surrounding the mount on the upper surface of the insulating substrate, and a metal frame joined to the frame-shaped metallized layer with a brazing material. The frame-shaped metallized layer includes a first sloping portion sloping inwardly from an upper surface to an inner peripheral surface. The brazing material includes a fillet portion formed between an upper outer periphery of the frame-shaped metallized layer and the metal frame, and a filling portion formed between the first sloping portion and the metal frame.

A bonding method and a bonding structure are provided. A device substrate is provided including a plurality of semiconductor devices, wherein each of the semiconductor devices includes a first bonding layer. A cap substrate is provided including a plurality of cap structures, wherein each of the cap structures includes a second bonding layer, the second bonding layer having a planar surface and a first protrusion protruding from the planar surface. The device substrate is bonded to the cap substrate by engaging the first protrusion of the second bonding layer of each of the cap structures with the corresponding first bonding layer of each of the semiconductor devices in the device substrate.

A device (2) is formed on a main surface of a semiconductor substrate (1). A passivation film (5) covers the main surface. A metallized pattern (6) is formed on the passivation film (5) and surrounds the device (2). A sealing metal layer (7) is formed on the metallized pattern (6) and includes a corner portion (10) in a planar view. A lid (8) is bonded to the metallized pattern (6) with the sealing metal layer (7) interposed therebetween and vacuum-seals the device (2). A dummy wiring (11) is softer than the metallized pattern (6), is formed at least between an outer portion of the corner portion of the sealing metal layer (7) and the semiconductor substrate (1), and does not electrically connected to the device (2).

The present invention includes: a substrate 3, a rectangular frame-shaped substrate bank section 5 provided on the substrate 3 and including four corner portions 5A, and a metal layer 9 provided on a top surface 5Aa of the substrate bank section 5. A top surface 5Aa of the corner portions 5A of the substrate bank section 5 may have an inclined portion S slanted downward. An electronic component housing package may have a lid welded onto the metal layer 9 provided on the substrate bank section 5 of the electronic component storage substrate.

A light emitting device includes a package having a recess, a light emitting element disposed in the recess, a light-transmissive member covering an opening of the recess, and a frame member bonded to the package. The light-transmissive member is held by and between the package and the frame member.

An integrated device package is disclosed. The package can include a package substrate comprising a composite die pad having an upper surface and a lower surface spaced from the upper surface along a vertical direction. The composite die pad can include an insulator die pad and a metal die pad. The insulator die pad and the metal die pad can be disposed adjacent one another along the vertical direction. The substrate can include a plurality of leads disposed about at least a portion of a perimeter of the composite die pad. An integrated device die can be mounted on the upper surface of the composite die pad.

Provided is an electronic device including a cover made of a material which is transparent to at least UV, and black printing which is impervious to UV and is applied on a peripheral edge portion of the cover. A cover-bonding portion has an overflow prevention recess into which a UV-curing adhesive applied between the cover-bonding portion and the cover flows. Emitted UV is reflected by a surface of the overflow prevention recess and caused to reach space which is located inward relative to the black printing and between a backside of the peripheral edge portion of the cover and the cover-bonding portion, thereby curing the UV-curing adhesive.

A semiconductor structure includes a circuit substrate, a semiconductor die, and a cover. The semiconductor die is disposed on the circuit substrate. The cover is disposed over the semiconductor die and over the circuit substrate. The cover comprises a lid portion and a support portion. The structure includes a first adhesive bonding the support portion to the circuit substrate and a second adhesive bonding the support portion and the lid portion.

A method and structure for packaging a semiconductor device are provided. In an embodiment a first substrate is bonded to a second substrate, which is bonded to a third substrate. A thermal interface material is placed on the second substrate prior to application of an underfill material. A ring can be placed on the thermal interface material, and an underfill material is dispensed between the second substrate and the third substrate. By placing the thermal interface material and ring prior to the underfill material, the underfill material cannot interfere with the interface between the thermal interface material and the second substrate, and the thermal interface material and ring can act as a physical barrier to the underfill material, thereby preventing overflow.