Patent classifications
H01L2924/1632
ELECTRONIC ELEMENT MOUNTING SUBSTRATE, ELECTRONIC DEVICE, ELECTRONIC MODULE, AND METHOD FOR MANUFACTURING ELECTRONIC ELEMENT MOUNTING SUBSTRATE
An electronic element mounting substrate includes a first insulating layer, a second insulating layer, a first metal layer, and a through-hole conductor. The first insulating layer and the second insulating layer are aligned in a first direction. The first metal layer is positioned between the first insulating layer and the second insulating layer. The through-hole conductor extends in the first direction from the first insulating layer through the second insulating layer. The first metal layer includes a first portion positioned away from the through-hole conductor and a second portion in contact with the through-hole conductor. The second portion has a larger thickness than the first portion.
Package structure and method of fabricating the same
A package structure includes a circuit substrate, a semiconductor package, a lid structure, a passive device and a barrier structure. The semiconductor package is disposed on and electrically connected to the circuit substrate. The lid structure is disposed on the circuit substrate covering the semiconductor package. The lid structure is attached to the circuit substrate through an adhesive material. The passive device is disposed on the circuit substrate in between the semiconductor package and the lid structure. The barrier structure is separating the passive device from the lid structure and the adhesive material, and the barrier structure is in contact with the adhesive material.
Semiconductor device assembly with heat transfer structure formed from semiconductor material
Semiconductor device assemblies with heat transfer structures formed from semiconductor materials are disclosed herein. In one embodiment, a semiconductor device assembly can include a thermal transfer structure formed from a semiconductor substrate. The thermal transfer structure includes an inner region, an outer region projecting from the inner region, and a cavity defined in the outer region by the inner and outer regions. The semiconductor device assembly further includes a stack of first semiconductor dies in the cavity, and a second semiconductor die attached to the outer region of the thermal transfer structure and enclosing the stack of first semiconductor dies within the cavity.
Semiconductor package structure
A semiconductor package structure includes a substrate. The substrate includes a first ground layer. The first ground layer has a body and a first tooth protruding from a side of the body. The first tooth has a first lateral side. The first lateral side of the first tooth is inclined relative to the side of the body in a top view of the first ground layer.
MULTI-COMPONENT MODULES (MCMs) INCLUDING CONFIGURABLE ELECTRO-MAGNETIC ISOLATION (EMI) SHIELD STRUCTURES, AND RELATED METHODS
Multi-component modules (MCMs) including configurable electromagnetic interference (EMI) shield structures, and related methods are disclosed. An EMI shield enclosing an IC or another electrical component in an MCM can protect other components within the MCM from EMI generated by the enclosed component. The EMI shield also protects the enclosed component from the EMI generated by other electrical components. An EMI shield with side-wall structures, in which vertical conductors supported by a wall medium electrically couple a lid of the EMI shield to a ground layer in a substrate, provides configurable EMI protection in an MCM. The EMI shield may also be employed to increase heat dissipation. The side-wall structures of the EMI shield are disposed on one or more sides of an electrical component and are configurable to provide a desired level of EMI isolation.
Semiconductor Package
A semiconductor package is disclosed for efficiently facilitating heat dissipation. The semiconductor package includes a substrate layer, a chip, a housing lid and thermal-conductive liquid. A chip is disposed on the substrate layer and electrically coupled to the substrate layer. The chip includes at least one through silicon via (TSV). The housing lid is disposed above both the substrate layer and the chip. Also, the housing lid is coupled to the substrate layer at its edge for forming an internal space that encompasses the chip. The thermal-conductive liquid is filled within the internal space.
SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME
A semiconductor package is disclosed. The semiconductor package may include a substrate, a first semiconductor chip on the substrate, an inner mold layer provided on the substrate to at least partially enclose the first semiconductor chip, an inner shielding layer provided on the substrate to at least partially enclose the inner mold layer, a second semiconductor chip stack on the inner shielding layer, an outer mold layer provided on the substrate to at least partially enclose the inner shielding layer and the second semiconductor chip stack, and an outer shielding layer at least partially enclosing the outer mold layer. Each of the inner and outer shielding layers may include a conductive material, and the inner shielding layer may be electrically connected to a ground pad of the substrate.
Molded Air-cavity Package and Device Comprising the Same
The present invention relates to a molded air-cavity package. In addition, the present invention is related to a device comprising the same. The present invention is particularly related to molded air-cavity packages for radio-frequency ‘RF’ applications including but not limited to RF power amplifiers.
Instead of using hard-stop features that are arranged around the entire perimeter of the package in a continuous manner, the present invention proposes to use spaced apart pillars formed by first and second cover supporting elements. By using only a limited amount of pillars, e.g. three or four, the position of the cover relative to the body can be defined in a more predictable manner. This particularly holds if the pillars are arranged in the outer corners of the package.
SEMICONDUCTOR PACKAGE WITH HEATSINK
A semiconductor package includes a substrate, a semiconductor die mounted on the substrate, and a heatsink over the semiconductor die. The heatsink includes a roof portion and at least one connecting portion extending between the roof portion and the substrate. The at least one connecting portion includes a connection lead mounted on a connection pad of the substrate. The connection pad includes a first portion and a second portion spaced apart from each other, which are configured to electrically couple to different voltage signals, respectively, for detecting heatsink floating.
Stacked silicon package assembly having thermal management
A chip package assembly and method for fabricating the same are provided which utilize a plurality of extra-die heat transfer posts for improved thermal management. In one example, a chip package assembly is provided that includes a first integrated circuit (IC) die mounted to a substrate, a cover disposed over the first IC die, and a plurality of extra-die conductive posts disposed between the cover and substrate. The extra-die conductive posts provide a heat transfer path between the cover and substrate that is laterally outward of the first IC die.