An assembly with modules (110, 1310) containing integrated circuits and attached to a wiring substrate (120) is reinforced by one or more reinforcement frames (410) attached to the wiring substrate. The modules are located in openings (e.g. cavities and/or through-holes 414) in the reinforcement frame. Other features are also provided.

A meal top stacking package structure and a method for manufacturing the same are provided, wherein the metal top stacking package structure includes a metal base including an upper surface and a lower surface, and a die receiver cavity formed in the upper surface; a first chip fixed on the die receiver cavity by a first adhesion layer; a substrate with an upper surface; a second chip fixed on the upper surface of the substrate by a second adhesion layer; and a plurality of connecting components formed on the upper surface of the substrate; wherein the upper surface of the metal base is connected with the substrate by the connecting components. Thereby, the structure and method can enhance heat dissipation and electromagnetic shield of the stacking package structure.

Semiconductor device assemblies with heat transfer structures formed from semiconductor materials are disclosed herein. In one embodiment, a semiconductor device assembly can include a thermal transfer structure formed from a semiconductor substrate. The thermal transfer structure includes an inner region, an outer region projecting from the inner region, and a cavity defined in the outer region by the inner and outer regions. The semiconductor device assembly further includes a stack of first semiconductor dies in the cavity, and a second semiconductor die attached to the outer region of the thermal transfer structure and enclosing the stack of first semiconductor dies within the cavity.

Die (110) are attached to an interposer (420), and the interposer/die assembly is placed into a lid cavity (510). The lid (210) is attached to the top of the assembly, possibly to the encapsulant (474) at the top. The lid's legs (520) surround the cavity and extend down below the top surface of the interposer's substrate (420S), possibly to the level of the bottom surface of the substrate or lower. The legs (520) may or may not be attached to the interposer/die assembly. In fabrication, the interposer wafer (420SW) has trenches (478) which receive the lid's legs during the lid placement. The interposer wafer is later thinned to remove the interposer wafer portion below the legs and to dice the interposer wafer. The thinning process also exposes, on the bottom, conductive vias (450) passing through the interposer substrate. Other features are also provided.

An integrated circuit (IC) package includes a first substrate having a backside surface and a top surface with a cavity disposed therein. The cavity has a floor defining a front side surface. A plurality of first electroconductive contacts are disposed on the front side surface, and a plurality of second electroconductive contacts are disposed on the back side surface. A plurality of first electroconductive elements penetrate through the first substrate and couple selected ones of the first and second electroconductive contacts to each other. A first die containing an IC is electroconductively coupled to corresponding ones of the first electroconductive contacts. A second substrate has a bottom surface that is sealingly attached to the top surface of the first substrate, and a dielectric material is disposed in the cavity so as to encapsulate the first die.

A printed circuit board includes: a printed wiring board including an insulating layer wherein a recessed part is provided on a top surface of the insulating layer, and a printed conductor provided inside the recessed part; a bare chip part mounted in the recessed part and electrically connected to the printed conductor; an electronic part mounted on the top surface of the printed wiring board other than the recessed part; and a cap fixed to the top surface of the printed wiring board and hollow-sealing the bare chip part mounted in the recessed part, wherein using a height of the top surface of the printed wiring board as a reference, a height of a top surface of the cap is equal to or below a maximum height of a top surface of the electronic part.

A module arrangement for power semiconductor devices, including one or more power semiconductor modules, wherein the one or more power semiconductor modules include a substrate with a first surface and a second surface being arranged opposite to the first surface, wherein the substrate is at least partially electrically insulating, wherein a conductive structure is arranged at the first surface of the substrate, wherein at least one power semiconductor device is arranged on the conductive structure and electrically connected thereto, wherein the one or more modules includes an inner volume for receiving the at least one power semiconductor device which volume is hermetically sealed from its surrounding by a module enclosure, wherein the module arrangement includes an arrangement enclosure at least partly defining a volume for receiving the one or more modules, and wherein the arrangement enclosure seals covers the volume.

The present invention is to provide an hermetic-sealing package member including a substrate and at least one frame-like sealing material for defining a sealing region formed on the substrate, in which the sealing material is formed of a sintered body obtained by sintering at least one metal powder selected from gold, silver, palladium, or platinum having a purity of 99.9 wt % or greater and an average particle size of 0.005 m to 1.0 m, and with respect to an arbitrary cross-section toward an outside from the sealing region, a length of an upper end of the sealing material is shorter than a length of a lower end. Examples of a cross-sectional shape of the sealing material may include one formed to have a base portion having a certain height and at least one mountain portion protruding from the base portion or one formed to have a mountain portion having substantially a triangular shape in which the length of the lower end of the sealing material is a bottom. By use of the hermetic-sealing package member of the present invention, a load is reduced at the time of hermetic-sealing and a sufficient sealing effect can be obtained.

Die (110) are attached to an interposer (420), and the interposer/die assembly is placed into a lid cavity (510). The lid (210) is attached to the top of the assembly, possibly to the encapsulant (474) at the top. The lid's legs (520) surround the cavity and extend down below the top surface of the interposer's substrate (420S), possibly to the level of the bottom surface of the substrate or lower. The legs (520) may or may not be attached to the interposer/die assembly. In fabrication, the interposer wafer (420SW) has trenches (478) which receive the lid's legs during the lid placement. The interposer wafer is later thinned to remove the interposer wafer portion below the legs and to dice the interposer wafer. The thinning process also exposes, on the bottom, conductive vias (450) passing through the interposer substrate. Other features are also provided.

A cavity package is disclosed comprising a metal leadframe, a metal ring connected to the metal leadframe, a plastic body molded to the metal leadframe forming a substrate cavity including an exposed die attach pad of the leadframe for affixing a semiconductor device, exposed lead fingers of the leadframe for wire bonding to the semiconductor device and an external circuit, and an exposed top surface of the metal ring, and a metal cap for closing and encapsulating the substrate cavity. The metal ring is integrated into the pre-molded cavity leadframe for providing an electrical ground path from the metal cap to the die attach pad and permitting attachment of the metal cap to the pre-molded leadframe using solder reflow.