A composite integrated circuit (IC) device structure comprising a host chip and a chiplet. The host chip comprises a first device layer and a first metallization layer. The chiplet comprises a second device layer and a second metallization layer that is interconnected to transistors of the second device layer. A top metallization layer comprising a plurality of first level interconnect (FLI) interfaces is over the chiplet and host chip. The chiplet is embedded between a first region of the first device layer and the top metallization layer. The first region of the first device layer is interconnected to the top metallization layer by one or more conductive vias extending through the second device layer or adjacent to an edge sidewall of the chiplet.

An amplifier includes a semiconductor die and a substrate that is distinct from the semiconductor die. The semiconductor die includes a III-V semiconductor substrate, a first RF signal input terminal, a first RF signal output terminal, and a transistor (e.g., a GaN FET). The transistor has a control terminal electrically coupled to the first RF signal input terminal, and a current-carrying terminal electrically coupled to the first RF signal output terminal. The substrate includes a second RF signal input terminal, a second RF signal output terminal, circuitry coupled between the second RF signal input terminal and the second RF signal output terminal, and an electrostatic discharge (ESD) protection circuit. The amplifier also includes a connection electrically coupled between the ESD protection circuit and the control terminal of the transistor. The substrate may be another semiconductor die (e.g., with a driver transistor and/or impedance matching circuitry) or an integrated passive device.

An electronic device module includes: a substrate; a sealing portion disposed on the substrate; at least one electronic device mounted on the substrate and embedded in the sealing portion; and a roof wiring at least partially disposed on a surface of the sealing portion and electrically connecting the substrate to the at least one electronic device or electrically connecting electronic devices, among the at least one electronic device, to each other. The roof wiring includes: a surface wiring disposed on one surface of the sealing portion; and at least one post wiring connecting the surface wiring to the substrate or to the at least one electronic device, and wherein at least a portion of a circumferential surface of the at least one post wiring is bonded to the surface wiring.

Disclosed is an EMI shielding material. The EMI shielding material comprises a resin material and metal particles mixed with each other, wherein the surface of the metal particles has an insulating protective layer. Further disclosed is a communication module product, comprising a module element arranged on a substrate, wherein the periphery of the module element that requires EMI shielding is filled with said shielding material. Further disclosed is an EMI shielding process, comprising the following steps: a. preparing a communication module on which a module element is provided; and b. applying said shielding material to a region of the module element that needs to be EMI shielded on the communication module. The shielding material can shield a chip region in a wrapping manner, that is, the shielding material can wrap and shield all six surfaces or six directions of the chip, and can provide shielding between chips. The shielding material, when combined with an existing shielding process, can achieve good shielding from low frequencies to high frequencies, and has very low process costs.

A module includes: a substrate having a first surface; a first component mounted on the first surface; a first sealing resin disposed to cover the first surface and the first component; a shield film covering at least a side surface of the first sealing resin; a first ground terminal mounted on the first surface; and a protruding portion formed to extend laterally at any position of the first ground terminal in a direction perpendicular to the first surface. The protruding portion is electrically connected to a portion of the shield film that covers the side surface of the first sealing resin.

Various disclosed embodiments include a substrate, a first interposer coupled to the substrate and to a first semiconductor device die, and a second interposer coupled to the substrate and to a second semiconductor device die. The first semiconductor device die may be a serializer/de-serializer die and the first semiconductor device die coupled to the first interposer may be located proximate to a sidewall of the substrate. In certain embodiments, the second semiconductor device die may be a system-on-chip die. In further embodiments, the second interposer may also be coupled to high bandwidth memory die. Placing a serializer/de-serializer die proximate to a sidewall of a substrate allows a length of electrical pathways to be reduced, thus reducing impedance and RC delay. The use of smaller, separate, interposers also reduces complexity of fabrication of interposers and similarly lowers impedance associated with redistribution interconnect structures associated with the interposers.

A semiconductor package includes a redistribution substrate including a first surface and a second surface that are opposite to each other, an antenna substrate on the first surface and including a first insulating portion and antenna patterns on a top surface of the first insulating portion, and a first semiconductor chip on the second surface. The redistribution substrate includes a second insulating portion, and a redistribution pattern in the second insulating portion. The redistribution pattern includes an interconnection portion extending parallel to a top surface of the second insulating portion, and a via portion protruding from the interconnection portion toward the first surface. A width of the via portion decreases as a height in a direction from the second surface toward the first surface increases. The active surface of the first semiconductor chip is adjacent to the second surface.

Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a package substrate including a first conductive pathway electrically coupled to a power source; a mold material on the package substrate including a first microelectronic component embedded in the mold material, a second microelectronic component embedded in the mold material, and a TMV, between the first and second microelectronic components, the TMV electrically coupled to the first conductive pathway; a redistribution layer (RDL) on the mold material including a second conductive pathway electrically coupled to the TMV; and a third microelectronic component on the RDL and electrically coupled to the second conductive pathway, wherein the second conductive pathway electrically couples the TMV, the first microelectronic component, and the third microelectronic component.

Electronic device package stiffener and capacitor technology is disclosed. A combination stiffener and capacitor can include a structural material configured to be coupled to a substrate. The structural material can have a shape configured to provide mechanical support for the substrate. The combination stiffener and capacitor can also include first and second electrodes forming a capacitor. An electronic device package and a package substrate configured to receive the combination stiffener and capacitor are also disclosed.

A wireless transmission module, chips, a passive component, and a coil are integrated into an integral structure, so that an integration level of the wireless transmission module is improved. In addition, the integral structure can effectively implement independence of the module, and the independent module can be flexibly arranged inside structural design of an electronic device, and does not need to be disposed on a mainboard of the electronic device. Only an input terminal of the wireless transmission module needs to be retained on the mainboard of the electronic device. In addition, the integral structure can further effectively increase a capability of a product for working continuously and normally in an extremely harsh scenario, and improve product reliability. In addition, in the structure of the wireless transmission module, the chips and the coil are integrated, and signal transmission paths between the chips and the coil are relatively short.