A substrate, a packaged structure, and an electronic device are provided. The substrate is configured to be electrically connected to a chip. The chip includes a power terminal and a signal terminal. The substrate includes a first substrate and a second substrate mounted on the first substrate. The first substrate includes a first layout, and the first layout is configured to be electrically connected to the power terminal. The second substrate includes a second layout, and the second layout is configured to be electrically connected to the signal terminal. A spacing between lines of the second layout is less than a spacing between lines of the first layout. The substrate provided in this application has a small size and high integration.

Apparatus and methods are provided for integrated circuit packages having a low z-height. In an example, a method can include mounting a first integrated circuit sub-package to a first package substrate wherein the sub-package substrate spans an opening of the first package substrate, mounting a second integrated circuit package to a second package substrate, and mounting the first package substrate with the second package substrate wherein the mounting includes locating a portion of the second integrated circuit package within the opening of the first package substrate.

A power module includes a plurality of conductive wire groups and a sealing member. The plurality of conductive wire groups each include a first bonded portion and a second bonded portion. A maximum gap between intermediate portions of a pair of conductive wire groups adjacent to each other is larger than a first gap between the first bonded portions of the pair of conductive wire groups adjacent to each other. The maximum gap between the intermediate portions of the pair of conductive wire groups adjacent to each other is larger than a second gap between the second bonded portions of the pair of conductive wire groups adjacent to each other. Therefore, the power module is improved in reliability.

A method for providing electromagnetic shielding of a semiconductor die includes attaching a semiconductor die to a package substrate of a packaged radio frequency module, where the package substrate includes one or more radio frequency circuits fabricated therein. The method also includes encapsulating the semiconductor die with a molding compound. The method also includes at least partially covering the molding compound with an electromagnetic shielding structure having an outer layer including cobalt. A phone board assembly can include the packaged radio frequency module attached to a printed circuit board. The packaged radio frequency module can be incorporated into a mobile device.

A method of manufacturing a light emitting module is provided. A plurality of light-emitting diodes are aligned on an elongated base board. By a dispenser, an uncured paste of sealing material is continuously applied on a plurality of light-emitting diodes aligned on the elongated base board. The applied paste of sealing material is cured.

A spring electrode for a press-pack power semiconductor module includes a first electrode in contact with a power semiconductor chip, a second electrode arranged to face the first electrode, and a pressure pad which connects the first electrode and the second electrode and has flexibility in a normal direction of opposing surfaces of the first electrode and the second electrode. The opposing surfaces of the first electrode and the second electrode can be polygons of a pentagon or more, the pressure pad can be a cylindrical conductor or a plurality of wire conductors, and sides of the opposing surface of the first electrode and sides of the opposing surface of the second electrode corresponding to these sides are connected in parallel by the pressure pad.

A multi-chip package includes a substrate (110) having a first side (111), an opposing second side (112), and a third side (213) that extends from the first side to the second side, a first die (120) attached to the first side of the substrate and a second die (130) attached to the first side of the substrate, and a bridge (140) adjacent to the third side of the substrate and attached to the first die and to the second die. No portion of the substrate is underneath the bridge. The bridge creates a connection between the first die and the second die. Alternatively, the bridge may be disposed in a cavity (615, 915) in the substrate or between the substrate and a die layer (750). The bridge may constitute an active die and may be attached to the substrate using wirebonds (241, 841, 1141, 1541).

Power amplifier electronics for controlling application of radio frequency (RF) energy generated using solid state electronic components may further be configured to control application of RF energy in cycles between high and low powers. The power amplifier electronics may include a semiconductor die on which one or more RF power transistors are fabricated, an output matching network configured to provide impedance matching between the semiconductor die and external components operably coupled to an output tab, and bonding ribbon bonded at terminal ends thereof to operably couple the one or more RF power transistors of the semiconductor die to the output matching network. The bonding ribbon may have a width of greater than about five times a thickness of the bonding ribbon.

A semiconductor device of embodiments includes an insulating substrate, a first main terminal, a second main terminal, an output terminal, a first metal layer connected to the first main terminal, a second metal layer connected to the second main terminal, a third metal layer disposed between the first metal layer and the second metal layer and connected to the output terminal, a first semiconductor chip and a second semiconductor chip provided on the first metal layer, a third semiconductor chip and a fourth semiconductor chip provided on the third metal layer, and a conductive member on the second metal layer. Then, the second metal layer includes a slit. The conductive member is provided between the end portion of the second metal layer and the slit.

A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a substrate and a first passive device. The substrate has a first surface and a second surface opposite to the first surface. The first passive device includes a first terminal and a second terminal, wherein the first terminal is closer to the first surface than to the second surface, and the second terminal is closer to the second surface than to the first surface.