H01L2924/3656

Composite bump, method for forming composite bump, and substrate

A composite bump includes a plurality of first bumps that is metal-bonded to an electrode pad of a semiconductor chip, and a second bump that is metal-bonded to the plurality of first bumps. A method for forming a composite bump, includes forming a plurality of first bumps to be metal-bonded to an electrode pad of a semiconductor chip, and forming a second bump to be metal-bonded to the plurality of first bumps.

Packaging devices and methods of manufacture thereof

Packaging devices and methods of manufacture thereof for semiconductor devices are disclosed. In some embodiments, a method of manufacturing a packaging device includes forming an interconnect wiring over a substrate, and forming conductive balls over portions of the interconnect wiring. A molding material is deposited over the conductive balls and the substrate, and a portion of the molding material is removed from over scribe line regions of the substrate.

Copper Deposition in Wafer Level Packaging of Integrated Circuits

An electrodeposition composition comprising: (a) a source of copper ions; (b) an acid; (c) a suppressor, and (d) a leveler, wherein the leveler comprises a quaternized dipyridyl compound prepared by reacting a dipyridyl compound with a difunctional alkylating agent or a quaternized poly(epihalohydrin). The electrodeposition composition can be used in a process for forming a copper feature over a semiconductor substrate in wafer level packaging to electrodeposit a copper bump or pillar on an underbump structure of a semiconductor assembly.

COPPER PILLARS HAVING IMPROVED INTEGRITY AND METHODS OF MAKING THE SAME
20190259722 · 2019-08-22 ·

The copper pillars have improved integrity such that they can readily withstand the harsh reflow conditions of post solder bump application without readily failing. The method of making the copper pillars having the improved integrity involves a two-step electroplating process of varying current densities.

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
20190237421 · 2019-08-01 ·

A semiconductor device includes a pad electrode formed over a semiconductor substrate, a conductor pillar formed on the pad electrode, a cap film formed on the conductor pillar and made of a nickel film, a terminal formed in a wiring board, a metal film formed on the terminal and made of a nickel film containing phosphorus, a solder layer interposed between the cap film and the metal film and containing tin as a main component, and an alloy layer interposed between the solder layer and the metal film and containing tin and copper.

ELECTRONIC DEVICES WITH BOND PADS FORMED ON A MOLYBDENUM LAYER
20190206785 · 2019-07-04 ·

An electronic device comprises: a molybdenum layer; a bond pad formed on the molybdenum layer, the bond pad comprising aluminum; and a wire bonded to the bond pad, the wire comprising gold.

Cu3Sn VIA METALLIZATION IN ELECTRICAL DEVICES FOR LOW-TEMPERATURE 3D-INTEGRATION
20240203790 · 2024-06-20 · ·

A Cu.sub.3Sn electrical interconnect and method of making same in an electrical device, such as for hybrid bond 3D-integration of the electrical device with one or more other electrical devices. The method of forming the Cu.sub.3Sn electrical interconnect includes: depositing a Sn layer in the via hole; depositing a Cu layer atop and in contact with the Sn layer; and heating the Sn layer and the Cu layer such that the Sn and Cu layers diffuse together to form a Cu.sub.3Sn interconnect in the via hole. During the heating, a diffusion front between the Sn and Cu layers moves in a direction toward the Cu layer as initially deposited, such that any remaining Cu layer or any voids formed during the diffusion are at an upper region of the formed Cu.sub.3Sn interconnect in the via hole, thereby allowing such voids or remaining material to be easily removed.

SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD
20190139918 · 2019-05-09 ·

A semiconductor device manufacturing method includes: preparing a semiconductor substrate including an electrode; forming a wire connected to the electrode; forming a first insulating film including a first opening that partially exposes the wire; forming a base portion that is connected to a portion of the wire exposed via the first opening, and that comprises a conductor including a recess corresponding to the first opening; forming a solder film on a surface of the base portion; and fusing solder included in the solder film by a first heat treatment, and filling the recess with the fused solder.

JOINING MATERIAL AND JOINING METHOD USING SAME

There are provided a bonding material, which can prevent voids from being generated in a silver bonding layer by preventing the entrainment of bubbles during the formation of a coating film even if the coating film is thickened, and a bonding method using the same. The bonding material of a silver paste includes fine silver particles, a solvent and an addition agent, wherein the solvent contains a first solvent of a diol, such as octanediol, and a second solvent which is a polar solvent (preferably one or more selected from the group consisting of dibutyl diglycol, hexyl diglycol, decanol and dodecanol) having a lower surface tension than that of the first solvent and wherein the addition agent is a triol.

EXPANDED HEAD PILLAR FOR BUMP BONDS
20190109108 · 2019-04-11 · ·

A microelectronic device has a bump bond structure including an electrically conductive pillar with an expanded head, and solder on the expanded head. The electrically conductive pillar includes a column extending from an I/O pad to the expanded head. The expanded head extends laterally past the column on at least one side of the electrically conductive pillar. In one aspect, the expanded head may have a rounded side profile with a radius approximately equal to a thickness of the expanded head, and a flat top surface. In another aspect, the expanded head may extend past the column by different lateral distances in different lateral directions. In a further aspect, the expanded head may have two connection areas for making electrical connections to two separate nodes. Methods for forming the microelectronic device are disclosed.