An electrically pumped photonic-crystal surface-emitting laser, the epitaxy structure has a first mesa, the first mesa has multiple air holes and forming a photonic crystal structure, the epitaxy structure further has a second mesa, the second mesa and photonic crystal structure is facing the same direction; a first metal electrode arranged on the insulating layer, and covering the photonic crystal structure; a second metal electrode arranged on the second mesa and protruding out of the groove, making the first metal electrode and the second metal electrode face the same direction; and further make the first metal electrode connect to the first connecting metal and make the second metal electrode connect to the second connecting metal for making the photonic crystal structure become flip chip.

An array type semiconductor laser device includes: a second electrode (p-electrode) disposed on another conductivity type semiconductor layer; a third electrode (n-electrode) disposed on a one conductivity type semiconductor layer and between a first electrode (p-electrode) and the second electrode; a fifth electrode (n-electrode) disposed on the one conductivity type semiconductor layer and between the third electrode and the second electrode; a sixth electrode (n-electrode) disposed on the one conductivity type semiconductor layer and across from the fifth electrode; a first conductor (wire) that electrically connects the second electrode and the third electrode; and a second conductor (n-wiring) that electrically connects the fifth electrode and the sixth electrode.

In some implementations, an opto-electrical device includes a heatsink; a thermally conductive element disposed on a first region of a surface of the heatsink; an adaptive thickness thermally conductive pad disposed on the thermally conductive element; an integrated circuit (IC) disposed on the adaptive thickness thermally conductive pad; a thermoelectric cooler (TEC) disposed on a second region of the surface of the heatsink; an opto-electrical chip disposed on the TEC; and a substrate disposed on the IC and the opto-electrical chip, wherein the substrate is configured to electrically connect the IC and the opto-electrical chip.

In some implementations, an opto-electrical device includes a heatsink; a thermally conductive element disposed on a first region of a surface of the heatsink; an adaptive thickness thermally conductive pad disposed on the thermally conductive element; an integrated circuit (IC) disposed on the adaptive thickness thermally conductive pad; a thermoelectric cooler (TEC) disposed on a second region of the surface of the heatsink; an opto-electrical chip disposed on the TEC; and a substrate disposed on the IC and the opto-electrical chip, wherein the substrate is configured to electrically connect the IC and the opto-electrical chip.

The present disclosure provides a three-dimensional packaging method and a three-dimensional package structure of a photonic-electronic chip. The method includes: fixing an electronic chip on a first area of a first surface of a photonic chip; fixing a dummy chip on a second area of the first surface of the photonic chip, wherein the photonic chip is provided with an optical coupling interface at the second area, and the dummy chip has a cavity with a single-sided opening, and the opening of the cavity faces and covers an optical coupling interface.

The present disclosure provides a three-dimensional packaging method and a three-dimensional package structure of a photonic-electronic chip. The method includes: fixing an electronic chip on a first area of a first surface of a photonic chip; fixing a dummy chip on a second area of the first surface of the photonic chip, wherein the photonic chip is provided with an optical coupling interface at the second area, and the dummy chip has a cavity with a single-sided opening, and the opening of the cavity faces and covers an optical coupling interface.

A laser system includes a resonant laser cavity configured to output a laser signal. The system also includes a utility waveguide configured to receive the laser signal from the laser cavity. The utility waveguide includes a perturbation region that is external to the laser cavity and receives the laser signal from the laser cavity and outputs a laser beam. The perturbation region includes one or more perturbation structures that each causes one or more perturbation(s) in the index of refraction of the utility waveguide. The perturbation structures are selected to provide optical feedback to the resonant laser cavity such that a power versus wavelength distribution in the laser beam is different from the power versus wavelength distribution that would be in the laser signal in the absence of the perturbation structures.

A laser package is described, the laser package comprising a plurality of laser diodes separately attached to at least one sub-mount having respective connecting pads, wherein, during operation, each of the laser diodes emits light having a fast axis and a slow axis defining a fast axis plane and a slow axis plane, wherein the fast axis planes of all laser diodes are parallel to each other and the distance between the fast axis planes of at least two laser diodes is smaller than the lateral distance between these laser diodes. Furthermore, a system with at least two laser packages is described.

A laser package is described, the laser package comprising a plurality of laser diodes separately attached to at least one sub-mount having respective connecting pads, wherein, during operation, each of the laser diodes emits light having a fast axis and a slow axis defining a fast axis plane and a slow axis plane, wherein the fast axis planes of all laser diodes are parallel to each other and the distance between the fast axis planes of at least two laser diodes is smaller than the lateral distance between these laser diodes. Furthermore, a system with at least two laser packages is described.

A semiconductor light emitting device includes a substrate and a semiconductor multilayer stacked on the substrate. The semiconductor multilayer includes an n-side clad layer stacked above the substrate, an active layer stacked above the n-side clad layer, and a p-side clad layer stacked above the active layer. The semiconductor multilayer includes a first plane perpendicular to a stacking direction in which the semiconductor multilayer is stacked, and a lattice constant inside the first plane is an anisotropy constant.