A surface emitting laser module includes a base substrate, a surface emitting laser substrate mounted on the base substrate, the surface emitting laser substrate including a surface emitting laser element, and the surface emitting laser substrate having a first face facing the base substrate and a second face facing away from the base substrate, and an optical member facing the second face and including an optical element configured to receive light emitted from the second face of the surface emitting laser element. The surface emitting laser element includes a first semiconductor layer, a second semiconductor layer, a first electrode provided on the first face and connected to the first semiconductor layer, and a second electrode provided on the first face and connected to the second semiconductor layer. The base substrate includes a third electrode connected to the first electrode and a fourth electrode connected to the second electrode.

Coupled-cavity vertical cavity surface emitting lasers (VCSELs) are provided by the present disclosure. The coupled-cavity VCSEL can comprise a VCSEL having a first mirror, a gain medium disposed above the first mirror, and a second mirror disposed above the gain medium, wherein a first cavity is formed by the first mirror and the second mirror. A second cavity is optically coupled to the VCSEL and configured to reflect light emitted from the VCSEL back into the first cavity of the VCSEL. In some embodiments, the second cavity can be an external cavity optically coupled to the VCSEL through a coupling component. In some embodiments, the second cavity can be integrated with the VCSEL to form a monolithic coupled-cavity VCSEL. A feedback circuit can control operation of the coupled-cavity VCSEL so the output comprises a target high frequency signal.

The light emitting device according to an embodiment of the present disclosure includes: a substrate; a semiconductor stacked body; a first electrically conductive layer; a second electrically conductive layer; and a through wiring line. The substrate has a first surface and a second surface that are opposed to each other. The semiconductor stacked body is provided on the first surface of the substrate. The semiconductor stacked body has a plurality of light emitting regions each of which allows a laser beam to be emitted. The first electrically conductive layer is provided on a front surface of the semiconductor stacked body. The front surface is opposite to the substrate. The second electrically conductive layer is provided on the second surface of the substrate. The second electrically conductive layer is provided to allow a predetermined voltage to be applied to the semiconductor stacked body in each of a plurality of the light emitting regions. The through wiring line electrically couples the first electrically conductive layer and the second electrically conductive layer.

Provided is a back side emitting light source array device and an electronic apparatus, the back side emitting light source array device includes a substrate, a distributed Bragg reflector (DBR) provided on a first surface of the substrate, a plurality of gain layers which are provided on the DBR, the plurality of gain layers being spaced apart from one another, and each of the plurality of gain layers being configured to individually generate light, and a nanostructure reflector provided on the plurality of gain layers opposite to the DBR, and including a plurality of nanostructures having a sub-wavelength shape dimension, wherein a reflectivity of the DBR is less than a reflectivity of the nanostructure reflector such that the light generated is emitted through the substrate.

A vertical cavity surface emitting device includes a substrate, a first multilayer film reflecting mirror on the substrate, a first semiconductor layer on the first multilayer film reflecting mirror, a light-emitting layer on the first semiconductor layer, and a second semiconductor layer on the light-emitting layer. The second semiconductor layer includes a low resistance region and a high resistance region on an upper surface. The high resistance region is depressed from the low resistance region toward the light-emitting layer outside the low resistance region and impurities of the second conductivity type are inactivated in the high resistance region such that the high resistance region has an electrical resistance higher than an electrical resistance of the low resistance region. A light-transmitting electrode layer is in contact with the low resistance region and the high resistance region, and a second multilayer film reflecting mirror is on the light-transmitting electrode layer.

A method of fabricating vertical cavity surface emitting laser, comprising: providing a first substrate formed with a dielectric DBR and a first bonding layer, and a second substrate formed with a etch-stop layer, a heavily doped layer, an active region, a current-confinement layer, and an arsenide DBR firstly, then sticking a third substrate on the arsenide DBR, then removing the second substrate and the etch-stop layer, next bonding the heavily doped layer to the dielectric DBR, next removing the third substrate, finally forming a p-type electrode contact and an n-type electrode contact.

A pixel structure for a vertical cavity surface emitting laser has an emission window. The pixel structure includes a plurality of sub-pixels in the emission window. Bright-area sub-pixels emit light and dark-area sub-pixels having no light emission. The bright-area sub-pixels and the dark-area sub-pixels are arranged in a pattern in the emission window. Various patterns are possible. Different structures for implementing the sub-pixels are described.

An emitter array may comprise a plurality of emitters and a metallization layer to electrically connect the plurality of emitters. The metallization layer may have a first end and a second end. The plurality of emitters may include a first emitter and a second emitter. The first emitter may be located closer to the first end than the second emitter. The first emitter and the second emitter have differently sized structures to compensate for a first impedance of the metallization layer between the first end and the first emitter and a second impedance between the first end and the second emitter.

A light-emitting device according to an embodiment of the present disclosure includes a laminate. The laminate includes an active layer, and a first semiconductor layer and a second semiconductor layer sandwiching the active layer. This light-emitting device further includes a current constriction layer having an opening and a vertical resonator including a first reflecting mirror having a concave-curved shape on the first semiconductor layer side and a second reflecting mirror on the second semiconductor side. The first reflecting mirror and the second reflecting mirror sandwich the laminate and the opening. This light-emitting device further includes an optically transparent substrate between the first reflecting mirror and the laminate. The optically transparent substrate has a first convex portion having a convex-curved shape and one or more second convex portions on a surface on the side opposite to the laminate. The first convex portion is in contact with the first reflecting mirror. The one or more second convex portions are provided around the first convex portion. The one or more second convex portions each have a height greater than or equal to a height of the first convex portion, and an end on the first reflecting mirror side has a convex-curved shape.

In some implementations, an optical device for mounting in a flip-chip configuration includes a plurality of flip-chip bumps that are arranged in a pattern on the optical device, wherein the pattern is not aligned with a crystal cleavage plane associated with a substrate of the optical device. In some implementations, the optical device further includes a gap that separates a primary region of the optical device and a secondary region of the optical device, wherein at least one portion of a side of the gap is oriented at a non-zero angle to the crystal cleavage plane.