Methods, devices and systems are described for enabling a series-connected, single chip vertical-cavity surface-emitting laser (VCSEL) array. In one aspect, the single chip includes one or more non-conductive regions one the conductive layer to produce a plurality of electrically separate conductive regions. Each electrically separate region may have a plurality of VCSEL elements, including an anode region and a cathode region connected in series. The chip is connected to a sub-mount with a metallization pattern, which connects each electrically separate region on the conductive layer in series. In one aspect, the metallization pattern connects the anode region of a first electrically separate region to the cathode region of a second electrically separate region. The metallization pattern may also comprise cuts that maintain electrical separation between the anode and cathode regions on each conductive layer region, and that align with the etched regions.

A vertical cavity surface emitting laser includes a post provided at a major surface of a substrate and extending along a first axis intersecting the major surface of the substrate, and an electrode provided at an upper surface of the post and surrounding the first axis. The post includes a first distributed Bragg reflector, an active layer, a current confinement layer, and a second distributed Bragg reflector. The substrate, the first distributed Bragg reflector, the active layer, the current confinement layer, and the second distributed Bragg reflector are disposed in order in a direction of the first axis.

A light-emitting element includes a mesa structure in which a first compound semiconductor layer of a first conductivity type, an active layer, and a second compound semiconductor layer of a second conductivity type are disposed in that order, wherein at least one of the first compound semiconductor layer and the second compound semiconductor layer has a current constriction region surrounded by an insulation region extending inward from a sidewall portion of the mesa structure; a wall structure disposed so as to surround the mesa structure; at least one bridge structure connecting the mesa structure and the wall structure, the wall structure and the bridge structure each having the same layer structure as the portion of the mesa structure in which the insulation region is provided; a first electrode; and a second electrode disposed on a top face of the wall structure.

A vertical cavity surface emitting laser (VCSEL) has first and second electrical contacts, and an optical resonator. The optical resonator has first and second distributed Bragg reflectors (DBRs), an active layer, a distributed heterojunction bipolar phototransistor (DHBP), and an optical guide. The DHBP has a collector layer, light sensitive layer; a base layer; and an emitter layer. There is an optical coupling between the active layer and the DHBP for providing an active carrier confinement by the DHBP. The optical guide guides an optical mode within the optical resonator during operation. The optical guide is outside a current flow which can be provided by the first and second electrical contacts during operation of the VCSEL. The optical guide is outside a layer sequence between the first and second electrical contacts in the vertical direction of the VCSEL. The optical guide has an oxide aperture arranged in the second DBR.

Provided is a back side emitting light source array device and an electronic apparatus, the back side emitting light source array device includes a substrate, a distributed Bragg reflector (DBR) provided on a first surface of the substrate, a plurality of gain layers which are provided on the DBR, the plurality of gain layers being spaced apart from one another, and each of the plurality of gain layers being configured to individually generate light, and a nanostructure reflector provided on the plurality of gain layers opposite to the DBR, and including a plurality of nanostructures having a sub-wavelength shape dimension, wherein a reflectivity of the DBR is less than a reflectivity of the nanostructure reflector such that the light generated is emitted through the substrate.

A light emitting element according to the present disclosure includes a first light reflecting layer 41, a laminated structure 20, and a second light reflecting layer 42 laminated to each other. The laminated structure 20 includes a first compound semiconductor layer 21, a light emitting layer 23, and a second compound semiconductor layer 22 laminated to each other from a side of the first light reflecting layer. Light from the laminated structure 20 is emitted to an outside via the first light reflecting layer 41 or the second light reflecting layer 42. The first light reflecting layer 41 has a structure in which at least two types of thin films 41A and 41B are alternately laminated to each other in plural numbers. A film thickness modulating layer 80 is provided between the laminated structure 20 and the first light reflecting layer 41.

A light emitting device, includes a selective growth mask layer 44; a first light reflection layer 41 thinner than the selective growth mask layer 44; a laminated structure including a first compound semiconductor layer 21, an active layer 23, and a second compound semiconductor layer 22, the first compound semiconductor layer 21 being formed on the first light reflection layer 41; and a second electrode 32 formed on the second compound semiconductor layer 22, and a second light reflection layer 42, in which the second light reflection layer 42 is opposed to the first light reflection layer 41, and the second light reflection layer is not formed on an upper side of the selective growth mask layer 44.

An optoelectronic semiconductor device is disclosed wherein the device is a vertical-cavity surface-emitting laser or a photodiode containing a section, the top part of which is electrically isolated from the rest of the device. The electric isolation can be realized by etching a set of holes and selective oxidation of AlGaAs layer or layers such that the oxide forms a continuous layer or layers everywhere beneath the top surface of this section. Alternatively, a device can be grown epitaxially on a semi-insulating substrate, and a round trench around a section of the device can be etched down to the semi-insulating substrate thus isolating this section electrically from the rest of the device. Then if top contact pads are deposited on top of the electrically isolated section, the pads have a low capacitance, and a pad capacitance below two hundred femto-Farads, and the total capacitance of the device below three hundred femto-Farads can be reached.

An optical device of one embodiment outputs light in a short-wavelength range such as a visible range. The optical device includes a UC layer, first and second light-confinement layers, and a resonance mode forming layer. The UC layer contains an upconversion material receiving excitation light in a first wavelength range and outputting light in a second wavelength range. The first light-confinement layer has a characteristic of reflecting part of the second wavelength-range light. The second light-confinement layer has a characteristic of reflecting part of the second wavelength-range light and transmitting the remainder, and is disposed such that the UC layer locates between the first and second light-confinement layers. The resonance mode forming layer locates between the UC layer and the first or second light-confinement layer, includes a base layer and plural modified refractive index regions, and forms a resonance mode of the second wavelength-range light.

An emitter may include a substrate, a conductive layer on at least a bottom surface of a trench, and a first metal layer to provide a first electrical contact of the emitter on an epitaxial side of the substrate. The first metal layer may be within the trench such that the first metal layer contacts the conductive layer within the trench. The emitter may further include a second metal layer to provide a second electrical contact of the emitter on the epitaxial side of the substrate, and an isolation implant to block lateral current flow between the first electrical contact and the second electrical contact.