Patent classifications
H01S5/18308
Optical interconnects
The present disclosure relates to methods and apparatuses for improving tolerances of in-plane optical alignment of optical interconnects. An example method includes depositing a first reflector with a first spectral reflectivity on an end of an optical fiber, coupling a laser to another end of the optical fiber, changing a spectral reflectivity of a region of the first reflector adjacent to the end of a core of the optical fiber from the first spectral reflectivity by exposure to the laser, resulting in a first reflector with multiple regions of spectral reflectivity, and coupling the first reflector to an integrated unit comprising an optical cavity deposited on a second reflector.
Vertical cavity surface emitting laser with composite reflectors
A vertical cavity surface emitting laser (VCSEL) including a substrate and a bottom distributed Bragg reflector (DBR) having a plurality of layers deposited on the substrate. The VCSEL also includes a first charge confining layer deposited on the bottom DBR, an active region deposited on the first charge confining layer, and a second charge confining layer deposited on the active region. A current blocking layer is provided on the second charge confining layer, and a top epitaxial DBR including a plurality of top epitaxial DBR layers is deposited on the current blocking layer. A top electrode is deposited on the top epitaxial DBR, a bottom electrode is deposited on the bottom DBR and adjacent to the active region, and a top dielectric DBR is deposited on the top epitaxial DBR and the top electrode.
LIGHT EMITTING COMPONENT, PRINT HEAD, AND IMAGE FORMING APPARATUS
A light emitting component includes plural transfer elements, plural setting thyristors, and plural light emitting elements. The transfer elements are configured to be sequentially brought into an ON state. The setting thyristors are connected to the transfer elements, respectively. The setting thyristors are configured to be brought into a state where the setting thyristors are capable of changing to the ON state when the transfer elements are brought into the ON state. The light emitting elements are stacked on the setting thyristors through tunnel junctions, respectively. The light emitting elements are configured to emit light of increase a light emission amount when the setting thyristors are brought into the ON state.
Widely tunable swept source
A high-speed, single-mode, high power, reliable and manufacturable wavelength-tunable light source operative to emit wavelength tunable radiation over a wavelength range contained in a wavelength span between about 950 nm and about 1150 nm, including a vertical cavity laser (VCL), the VCL having a gain region with at least one compressively strained quantum well containing Indium, Gallium, and Arsenic.
LIGHT EMITTING ELEMENT
A light emitting element comprising a layered structure configured by layering a first light reflecting layer 41 configured by layering a plurality of thin films, a light emitting structure 20, and a second light reflecting layer 42 configured by layering a plurality of thin films, wherein the light emitting structure 20 is configured by layering, from the first light reflecting layer side, a first compound semiconductor layer 21, an active layer 23, and a second compound semiconductor layer 22, a second electrode 32 and an intermediate layer 70 are formed between the second compound semiconductor layer 22 and the second light reflecting layer 42 from the second compound semiconductor layer side, and the value of a surface roughness of a second surface 72 of the intermediate layer 70 in contact with the second light reflecting layer 42 is less than the value of a surface roughness of a first surface 71 of the intermediate layer 70 facing the second electrode 32.
LIGHT-EMITTING DEVICE
A light-emitting device is provided. The light-emitting device is configured to emit a radiation and comprises: a substrate; an epitaxial structure on the substrate and comprising a first DBR stack, a light-emitting stack and a second DBR stack and a contact layer in sequence; an electrode; a current blocking layer between the contact layer and the electrode; a first opening formed in the current blocking layer; and a second opening formed in the electrode and within the first opening; wherein a part of the electrode fills in the first opening and contacts the contact layer; and the light-emitting device is devoid of an oxidized layer and an ion implanted layer in the second DBR stack.
III-NITRIDE-BASED VERTICAL CAVITY SURFACE EMITTING LASER (VCSEL) CONFIGURATIONS
Vertical Cavity Surface Emitting Laser (VCSEL) configurations are disclosed. In a first example, the VCSEL includes a III-Nitride active region between a p-type III-Nitride layer and an n-type III-Nitride layer; and a curved minor on or above the p-type III-Nitride layer. The curved mirror can be formed in a III-Nitride layer or a Transparent Oxide (TO) material and enables the formation of a long VCSEL cavity that improves VCSEL lifetime, VCSEL output power, VCSEL power efficiency and VCSEL reliability. In a second example, the VCSEL has an active region with a high indium content. In a third example, the VCSEL is transparent.
Vertical-cavity surface-emitting laser array with multiple metal layers for addressing different groups of emitters
An optical device may include an array of vertical-cavity surface-emitting lasers (VCSELs) having a design wavelength, each VCSEL having an emission area. The optical device may include a first metal layer, substantially covering the array, a second metal layer substantially covering the first metal layer, and an electrical isolation layer, between the first metal layer and the second metal layer, that includes vias for electrically connecting portions of the first metal layer and portions of the second metal layer. The optical device may include a dielectric disposed over the emission area of each VCSEL. A variation in a thickness of the dielectric across at least approximately 90% of an area of the dielectric may be less than approximately 2% of the design wavelength. A depth of a well around the emission area may be equal to at least approximately 10% of a width of the emission area.
BACK SIDE EMITTING LIGHT SOURCE ARRAY DEVICE AND ELECTRONIC APPARATUS HAVING THE SAME
Provided is a back side emitting light source array device and an electronic apparatus, the back side emitting light source array device includes a substrate, a distributed Bragg reflector (DBR) provided on a first surface of the substrate, a plurality of gain layers which are provided on the DBR, the plurality of gain layers being spaced apart from one another, and each of the plurality of gain layers being configured to individually generate light, and a nanostructure reflector provided on the plurality of gain layers opposite to the DBR, and including a plurality of nanostructures having a sub-wavelength shape dimension, wherein a reflectivity of the DBR is less than a reflectivity of the nanostructure reflector such that the light generated is emitted through the substrate.
VERTICAL CAVITY SURFACE EMITTING DEVICE
A vertical cavity surface emitting device includes a substrate, a first multilayer film reflecting mirror on the substrate, a first semiconductor layer on the first multilayer film reflecting mirror, a light-emitting layer on the first semiconductor layer, and a second semiconductor layer on the light-emitting layer. The second semiconductor layer includes a low resistance region and a high resistance region on an upper surface. The high resistance region is depressed from the low resistance region toward the light-emitting layer outside the low resistance region and impurities of the second conductivity type are inactivated in the high resistance region such that the high resistance region has an electrical resistance higher than an electrical resistance of the low resistance region. A light-transmitting electrode layer is in contact with the low resistance region and the high resistance region, and a second multilayer film reflecting mirror is on the light-transmitting electrode layer.