Shown is a method of manufacturing a light emitting device capable of efficiently heating a device at the time of DPP annealing and suppressing heat generation of the device at the time of driving. In the method of manufacturing the light emitting device, a first p-type electrode is formed on a low-concentration portion having a low p-type dopant concentration formed under a first region of the p-type semiconductor portion, a second p-type electrode is formed on a high-concentration portion having a high p-type dopant concentration formed under a second region of the p-type semiconductor portion, and a predetermined forward bias voltage is applied between the first p-type electrode and a first n-type electrode formed on an n-type semiconductor portion at the time of DPP annealing.

A semiconductor layer structure may include a substrate, a blocking layer disposed over the substrate, and one or more epitaxial layers disposed over the blocking layer. The blocking layer may have a thickness of between 50 nanometers (nm) and 4000 nm. The blocking layer may be configured to suppress defects from the substrate propagating to the one or more epitaxial layers. The one or more epitaxial layers may include a quantum-well layer that includes a quantum-well intermixing region formed using a high temperature treatment.

A III-nitride based device is fabricated having an in-plane lattice constant or strain that is more than 30% biaxially relaxed, by creating a III-nitride based decomposition stop layer on or above a III-nitride based decomposition layer, wherein a temperature is increased to decompose the III-nitride based decomposition layer; and growing a III-nitride based device structure on or above the III-nitride based decomposition stop layer. The III-nitride based device structure includes at least one of an n-type layer, active layer, and p-type layer, and at least one of the n-type layer, active layer and p-type layer has an in-plane lattice constant or strain that is preferably more than 30% biaxially relaxed, more preferably 50% or more biaxially relaxed, and most preferably at least 70% biaxially relaxed.

Structures for integrated lasers, systems including integrated lasers, and associated fabrication methods. A ring waveguide and a seed region are arranged interior of the ring waveguide. A laser strip extends across a portion of the ring waveguide. The laser strip has an end contacting the seed region and another opposing end. The laser strip includes a laser medium and a p-n junction capable of generating electromagnetic radiation. The p-n junction of the laser strip is aligned with a portion of the ring waveguide.

There is herein described a process for providing improved device performance and fabrication techniques for semiconductors. More particularly, the present invention relates to a process for forming features, such as pixels, on GaN semiconductors using a p-GaN modification and annealing process. The process also relates to a plasma and thermal anneal process which results in a p-GaN modified layer where the annealing simultaneously enables the formation of conductive p-GaN and modified p-GaN regions that behave in an n-like manner and block vertical current flow. The process also extends to Resonant-Cavity Light Emitting Diodes (RCLEDs), pixels with a variety of sizes and electrically insulating planar layer for electrical tracks and bond pads.

A vertical cavity surface emitting laser includes: an active layer; a first laminate for a first distributed Bragg reflector; and a first intermediate layer disposed between the active layer and the first laminate. The first intermediate layer has first and second portions. The first laminate, the first and second portions of the first intermediate layer, and the active layer are arranged along a direction of a first axis. The first laminate and the first portion of the first intermediate layer each include a first dopant. The active layer has a first-dopant concentration of less than 110.sup.16 cm.sup.3. The first portion of the first intermediate layer has a first-dopant concentration smaller than that of the first laminate. The second portion of the first intermediate layer has a first-dopant concentration smaller than that of the first portion of the first intermediate layer.

A semiconductor device includes an array of VCSEL devices with an annealed oxygen implant region (annealed at a temperature greater than 800 C.) that surrounds and extends laterally between the VCSEL devices. A common anode and a common cathode can be electrically coupled to the VCSEL devices, with the common anode overlying the annealed oxygen implant region. The annealed oxygen implant region can funnel current into active optical regions of the VCSEL devices and provide current isolation between the VCSEL devices while avoiding an isolation etch between VCSEL devices. In another embodiment, a semiconductor device includes an annealed oxygen implant region surrounding a VCSEL device. The VCSEL device(s) can be formed from a multi-junction layer structure where built-in hole charge Q.sub.p for an intermediate p-type layer relative to built-in electron charge Q.sub.n for a bottom n-type layer is configured for diode-like current-voltage characteristics of the VCSEL device(s).

A surface-emitting semiconductor laser includes a stacked semiconductor layer on a substrate; and a post including a current constriction structure including an oxide portion and a semiconductor portion, and an active layer. The post includes a peripheral portion and first to fourth portions. The oxide portion is located in the second and fourth portions, and the semiconductor portion is located in the first and third portions. The post includes first to fourth level parts that are sequentially arranged in a direction from the substrate to the stacked semiconductor layer. The active layer and the current constriction structure are located in the first and second level parts, respectively. The peripheral portion includes a first region having a first hydrogen concentration. The second level part includes a second region having a second hydrogen concentration. The first and second hydrogen concentrations are larger than that of the first portion.

A semiconductor device includes an array of VCSEL devices with an annealed oxygen implant region (annealed at a temperature greater than 800 C.) that surrounds and extends laterally between the VCSEL devices. A common anode and a common cathode can be electrically coupled to the VCSEL devices, with the common anode overlying the annealed oxygen implant region. The annealed oxygen implant region can funnel current into active optical regions of the VCSEL devices and provide current isolation between the VCSEL devices while avoiding an isolation etch between VCSEL devices. In another embodiment, a semiconductor device includes an annealed oxygen implant region surrounding a VCSEL device. The VCSEL device(s) can be formed from a multi-junction layer structure where built-in hole charge Q.sub.p for an intermediate p-type layer relative to built-in electron charge Q.sub.n for a bottom n-type layer is configured for diode-like current-voltage characteristics of the VCSEL device(s).

A semiconductor optical element includes a semiconductor layer portion that includes an optical waveguide layer. The semiconductor layer portion contains a first impurity having a function of suppressing atomic vacancy diffusion and a second impurity having a function of promoting atomic vacancy diffusion, between a topmost surface of the semiconductor layer portion and the optical waveguide layer. The semiconductor layer portion includes two or more regions that extend in a deposition direction. At least one of the two or more regions contains both the first impurity and the second impurity. The two or more regions have different degrees of disordering in the optical waveguide layer achieved through atomic vacancy diffusion and different band gap energies of the optical waveguide layer.