A semiconductor laser comprises: a substrate; a first cladding layer disposed above the substrate; a second cladding layer disposed above the first cladding layer so that the first cladding layer is positioned between the substrate and the second cladding layer; and a first mode expansion layer within the first cladding layer, a second mode expansion layer within the second cladding layer, or both the first mode expansion layer within the first cladding layer and the second mode expansion layer within the second cladding.

In an embodiment, an edge-emitting semiconductor laser diode includes a growth substrate, a semiconductor layer sequence located on the growth substrate, the semiconductor layer sequence having an active layer and an etch stop layer and two facets located opposite each other, wherein the facets bound the semiconductor layer sequence in a lateral direction, wherein the semiconductor layer sequence includes two edge regions adjoining the facets and a central region directly adjoining both edge regions, wherein, within each of the edge regions, a volume fraction of the active layer in the semiconductor layer sequence is smaller than in the central region, wherein the active layer is spaced apart from one facet, wherein a distance of the active layer to the facet varies along a direction parallel to this facet, and wherein the etch stop layer is arranged between the growth substrate and the active layer.

Some embodiments relate to a vertical cavity surface emitting laser (VCSEL) device including a VCSEL structure overlying a substrate. The VCSEL structure includes a first reflector, a second reflector, and an optically active region disposed between the first and second reflectors. A first spacer laterally encloses the second reflector. The first spacer comprises a first plurality of protrusions disposed along a sidewall of the second reflector.

An optical semiconductor device is provided with: a mesa in which a first conductivity type cladding layer, an active layer, and a second conductivity type first cladding layer having a second conductivity type are sequentially laminated on a surface of a first conductivity type substrate; a buried layer that buries both sides of the mesa with a top of the mesa being exposed; and a second conductivity type second cladding layer that buries the buried layer and the top of the mesa exposed from the buried layer, wherein the buried layer includes a layer doped with a semi-insulating material, and a boundary between the second conductivity type first cladding layer and the buried layer is inclined so that a width of the second conductivity-type first cladding layer becomes narrower toward the top of the mesa.

To provide a Fabry-Perot semiconductor laser diode obtained through a step of forming a mirror facet using an etching technology, in which the threshold current density for laser oscillation is reduced.

A method for manufacturing a semiconductor laser diode includes a step of forming a plurality of semiconductor laser diodes on a substrate, and then dividing the substrate into each semiconductor laser diode. The method includes a step of forming a laminate containing a first semiconductor layer 21, a waveguide layer (first guide layer 22, light emitting layer 23, second guide layer 24), and a second semiconductor layer 25 in this order on a substrate 1, a step of etching the laminate to separate the laminate into a portion serving as a resonance region and the other portion, an electrode layer forming step of forming a layer 51 serving as a second electrode on the second semiconductor layer 25 of the laminate to between the mirror facet 200 of the resonance region and a position where the substrate 1 is divided in the dividing step, and, after the electrode layer forming step, an etching step of simultaneously or sequentially performing the removal of a portion 51a formed at a position on the outer side relative to the mirror facet 200 of the layer serving as the second electrode and the formation the mirror facet 200.

A method of etching into a one or more epitaxial layers of respective semiconductor material(s) in a vertical cavity surface emitting laser (VCSEL) semiconductor structure, wherein the or each semiconductor material is a III-V semiconductor material, a III-N semiconductor material, or a II-VI semiconductor material is disclosed. The method comprises placing a substrate having the semiconductor structure thereon onto a support table in a plasma processing chamber, the semiconductor structure carrying a patterned mask on the surface of the semiconductor structure distal from the support table. The method also includes process steps of establishing a flow of an etch gas mixture through the plasma processing chamber and generating a plasma within the plasma processing chamber and simultaneously applying a radio frequency (RF) bias voltage to the support table; whereby the portion(s) of the semiconductor structure not covered by the patterned mask are exposed to the etch gas mixture plasma and are thereby etched to form at least one feature in the semiconductor structure; wherein more than 90% of the etch gas mixture consists of a mixture of silicon tetrachloride (SiCl.sub.4) and nitrogen (N.sub.2).

A semiconductor vertical resonant cavity light source includes an upper and lower mirror that define a vertical resonant cavity. An active region is within the cavity for light generation between the upper and lower mirror. At least one cavity spacer region is between the active region and the upper mirror or lower mirror. The cavity includes an inner mode confinement region and an outer current blocking region. An index guide in the inner mode confinement region is between the cavity spacer region and the upper or lower mirror. The index guide and outer current blocking region each include a lower and upper epitaxial material layer thereon with an epitaxial interface region in between. At least a top surface of the lower material layer includes aluminum in the interface region throughout a full area of an active part of the vertical light source.

A semiconductor device according to the present technology includes a first semiconductor layer; a second semiconductor layer; an active layer; and a transparent conductive layer. The first semiconductor layer has a first conductivity type, a stripe-shaped ridge being formed on a surface of the first semiconductor layer. A second width is 0.99-1.0 times a first width, a third width is 0.96-1.0 times the second width, and the transparent conductive layer has a uniform thickness within a range of 90% to 110% in a range of the third width, the first width being a width in a direction perpendicular to an extending direction of the ridge, the second width being a width in the direction on a surface of the transparent conductive layer on a side of the ridge, the third width being a width in the direction on a surface opposite to the ridge of the transparent conductive layer.

A method for producing a semiconductor optical device includes the steps of bonding a semiconductor chip to an SOI substrate having a waveguide, the semiconductor chip having an optical gain and including a first cladding layer, a core layer, and a second cladding layer that contain III-V group compound semiconductors and are sequentially stacked in this order, forming a covered portion with a first insulating layer on the second cladding layer, etching partway in the thickness direction the second cladding layer exposed from the first insulating film, forming a second insulating film covering from the covered portion to a part of a remaining portion of the second cladding layer, and forming a first tapered portion that is disposed on the waveguide and tapered along the extending direction of the waveguide by etching the core layer and the second cladding layer exposed from the second insulating film.

A semiconductor laser device includes: a semiconductor laminate body; an insulating layer disposed above the semiconductor laminate body and including a first opening extending in a first direction that is a direction from a front end surface toward a rear end surface; a first electrode disposed above the semiconductor laminate body; a second electrode disposed above the first electrode and the insulating layer; and an adhesion layer disposed between the second electrode and the insulating layer. The adhesion layer includes a second opening that at least partially overlaps with the first opening in plan view, the first electrode is at least partially disposed inside the first opening and the second opening, and the second electrode and the adhesion layer are disposed above the insulating layer between the first opening and at least one of the front end surface or the rear end surface.