An etched planarized VCSEL includes: an active region; a blocking region over the active region, and defining apertures therein; and conductive channel cores in the apertures, wherein the conductive channel cores and blocking region form an isolation region. A method of making the VCSEL includes: forming the active region; forming the blocking region over the active region; etching the apertures in the blocking region; and forming the conductive channel cores in the apertures of the blocking region. Another etched planarized VCSEL includes: an active region; a conductive region over the active region, and defining apertures therein; and blocking cores in the apertures, wherein the blocking cores and conductive region form an isolation region. A method of making the VCSEL includes: forming the active region; forming the conductive region over the active region; etching the apertures in the conductive region; and forming the blocking cores in the apertures of the conductive region.

An optoelectronic semiconductor chip which is a light emitting diode includes a semiconductor layer sequence having an n-conducting layer sequence, a p-conducting layer sequence, an active zone, at least one etching signal layer, and an etching structure, wherein the etching structure extends at least right into the etching signal layer, the etching signal layer has a signal constituent, the active zone generates radiation and is based on InAlGaP or on InAlGaAs, the etching signal layer is situated in the p-conducting layer sequence and is based on In.sub.1xyAl.sub.yGa.sub.xP or on In.sub.1xyAl.sub.yGa.sub.xAs where x+y<1, the signal constituent is Ga and 0.005x0.2, the signal constituent is not present in the layer adjoining the etching signal layer in a direction toward the etching structure, a thickness of the etching signal layer is 50 nm to 800 nm.

A semiconductor optical integrated device includes: a substrate; at least a lower cladding layer, a waveguide core layer, and an upper cladding layer sequentially layered on the substrate, a buried hetero structure waveguide portions each having a waveguide structure in which a semiconductor cladding material is embedded near each of both sides of the waveguide core layer; and a ridge waveguide portion having a waveguide structure in which a semiconductor layer including at least the upper cladding layer protrudes in a mesa shape. Further, a thickness of the upper cladding layer in each of the buried hetero structure waveguide portions is greater than a thickness of the upper cladding layer in the ridge waveguide portion.

A photonic integrated device (PID) for generating single and multiple wavelength optical signals is provided. The PID includes first and second reflective structures having first and second predetermined reflectivities, respectively. A common waveguide is optically coupled to the first reflective structure, and at least one semiconductor waveguide is optically coupled to the second reflective structure. The PID further includes at least one active gain region that is disposed between the first and second reflective structures. In various embodiments, the PID includes at least one of a dielectric waveguide based wavelength dependent element and a dielectric Bragg stack.

A III-Nitride based Vertical Cavity Surface Emitting Laser (VCSEL), wherein a cavity length of the VCSEL is controlled by etching.

A laser system includes an edge emitting semiconductor laser, and an optical fiber, wherein the laser emits one or more laser beams coupled into the optical fiber and the laser includes a semiconductor body including a waveguide region that includes first and second waveguide layers and an active layer arranged between the first and second waveguide layers and generates laser radiation, the waveguide region is arranged between first and second cladding layers disposed downstream of the waveguide region, a phase structure is formed in the semiconductor body, includes a cutout extending from a top side of the semiconductor body into the second cladding layer, at least one first intermediate layer composed of a semiconductor material different from the material of the second cladding layer is embedded therein, and the cutout extends from the top side of the semiconductor body at least partly into the first intermediate layer.

A vertical cavity surface emitting device includes a substrate, a first multilayer film reflecting mirror, a light-emitting structure layer with a light-emitting layer, and a second multilayer film reflecting mirror. The second multilayer film reflecting mirror constitutes a resonator between the first and second multilayer film reflecting mirrors. The second multilayer film reflecting mirror includes a first multilayer film, an intermediate film, and a second multilayer film. The first and second multilayer films have low refractive index films and high refractive index films that are alternately stacked. The intermediate film covers an upper surface of the first multilayer film and film has a translucency to a light emitted from the light-emitting layer. The second multilayer film partially covers an upper surface of the intermediate film. The intermediate film has a film thickness based on of a wavelength inside the intermediate film of light emitted from the light-emitting layer.

A vertical-cavity surface-emitting laser (VCSEL) may include a distributed Bragg reflector (DBR) stack. The DBR stack may include a mirror structure over a cavity region. The DBR stack may include an etch stop layer over the mirror structure. The DBR stack may include a grating layer over the etch stop layer. The grating layer may include a grating structure associated with polarization of output light emitted by the VCSEL.

A monolithically integrated thermal tunable laser comprising a layered substrate comprising an upper surface and a lower surface, and a thermal tuning assembly comprising a heating element positioned on the upper surface, a waveguide layer positioned between the upper surface and the lower surface, and a thermal insulation layer positioned between the waveguide layer and the lower surface, wherein the thermal insulation layer is at least partially etched out of an Indium Phosphide (InP) sacrificial layer, and wherein the thermal insulation layer is positioned between Indium Gallium Arsenide (InGaAs) etch stop layers.

An edge emitting semiconductor laser includes a semiconductor body including a waveguide region, the waveguide region including first and second waveguide layers and an active layer arranged between the first and second waveguide layers, that generates laser radiation; the waveguide region is arranged between a first and second cladding layers disposed downstream of the waveguide region; a phase structure for selection of lateral modes of the laser radiation emitted by the active layer, wherein the phase structure includes at least one cutout extending from a top side of the semiconductor body into the second cladding layer; at least one first intermediate layer composed of a semiconductor material different from that of the second cladding layer embedded into the second cladding layer; and the cutout at least partly extends from the top side into the first intermediate layer; the second cladding layer contains a first partial layer adjoining the waveguide region.