A laser diode includes a ridge portion, channel portions located adjacent to the ridge portion such that the ridge portion is sandwiched, the channel portions being shorter in height than the ridge portion, terrace portions adjacent to opposite sides of the respective channel portions from the ridge portion and longer in height than the channel portions, supporting portions provided over the respective channel portions, separated from side surfaces of the ridge portion or side surfaces of terrace portions or both, and made of resin, a ceiling portion including first portions provided over the supporting portions and second portions continuous with the first portions and located over the respective channel portions with hollow portions interposed therebetween, the ceiling portion being made of resin, and a metal layer provided over the ceiling portion and connected to an upper surface of the ridge portion.

A method of forming an assembly that includes a laser die having alignment aids and an interposer having a plurality of cavities and alignment aids formed in the plurality of cavities. One or more laser die is positioned in one or more cavity on the interposer substrate and locally heated to bond each laser die to contacts in the cavities of the interposer. The interposer substrate and the plurality of laser die are then heated to move the one or more die to aligned positions within the respective cavities. Complementary alignment aids on the laser die and in the interposer cavities facilitate the alignment of the laser die into aligned positions.

A semiconductor laser element includes: a substrate and a semiconductor stack including a first semiconductor layer, an active layer, and a second semiconductor layer sequentially stacked. A ridge is formed on a surface of the second semiconductor layer. The semiconductor stack includes: a first mesa connected to a side surface of the ridge, a second mesa adjacent to a first side surface or a second side surface of the substrate, the first mesa exposes a portion of a surface of the second semiconductor layer, and the second mesa exposes a portion of a surface of the first semiconductor layer. The semiconductor stack further includes: a connection surface exposing a portion of the surface of the first semiconductor layer, a first segment sidewall located between the first mesa and the connection surface, and a second segment sidewall located between the second mesa and the connection surface.