A power supply includes a second capacitor, an overcharge suppression circuit, a power supply circuit, and a controller. The controller includes: an overcharge suppression control circuit that controls the overcharge suppression circuit in accordance with a magnitude of a voltage of the second capacitor; and a resistance switching circuit that changes a resistance value of the current-limiting resistance circuit depending on whether a gate block state occurs or not and in accordance with a magnitude of the voltage of the first capacitor. In the gate block state, each of the switching elements is fixed in a non-conductive state.

A compact motor control system for selectively controlling power from a power source to a load includes a motor switching assembly having a solid state contactor with a plurality of solid state switches. The motor switching assembly also includes at least one direct current (DC) link coupled to the solid state contactor and redundant first and second inverters coupled to the at least one DC link. The motor switching assembly further includes a first relay coupled between the solid state contactor and an input of the inverter and a second relay coupled between the solid state contactor and an input of the second inverter. In addition, the motor control system includes a control system programmed to control the motor switching assembly to selectively supply power to the load from the power source.

An object of the present invention is to stop the driving of a semiconductor element swiftly at a time of abnormality while sharing an output terminal between temperature information and an error signal in an IPM. In the intelligent power module of the present invention, each drive circuit includes an output control circuit configured to select the error signal while the error signal generation circuit outputs the error signal, to select the temperature signal while the error signal generation circuit does not output the error signal, and to output a selected signal as an alarm signal. The temperature signal generation circuit is configured to change the voltage value of the temperature signal in accordance with the element temperature of the specific semiconductor element within a voltage range different from the voltage value of the error signal.

A current control device includes a constant current circuit and a current adjustment device. The current adjustment device applies a voltage to the constant current circuit. The constant current circuit draws a constant current according to the applied voltage. The micon sets a value of the constant current drawn by the constant current circuit, adjusts the voltage applied to the constant current circuit by the current adjustment device to a voltage according to the set value that is set. The micon adjusts the voltage being applied by the current adjustment device to the constant current circuit based on the difference value between the constant current drawn by the constant current circuit and the set value.

A power supply includes a second capacitor, an overcharge suppression circuit, a power supply circuit, and a controller. The controller includes: an overcharge suppression control circuit that controls the overcharge suppression circuit in accordance with a magnitude of a voltage of the second capacitor; and a resistance switching circuit that changes a resistance value of the current-limiting resistance circuit depending on whether a gate block state occurs or not and in accordance with a magnitude of the voltage of the first capacitor. In the gate block state, each of the switching elements is fixed in a non-conductive state.

An object of the present invention is to improve availability when a power is lost. In a power conversion device 1, a gate drive power supply circuit 50 can supply a gate drive power within a predetermined normal voltage range. A backup power supply circuit 70 supplies the gate drive power to a lower arm gate circuit 40 when a voltage of the gate drive power applied from the gate drive power supply circuit 50 to the lower arm gate circuit 40 falls below a normal voltage range. When the gate drive power is supplied from the backup power supply circuit 70, the lower arm gate circuit 40 drives a lower arm switching circuit 22 in a short state in which all switching elements of the lower arm switching circuit 22 are turned on.

A motor drive system includes: an inverter that drives a motor; a current detector that detects and outputs the first signal that is a current value of a current flowing through the inverter; a first low-pass filter that removes a noise frequency component from the first signal and outputs a second signal that is a current value after the noise frequency component has been removed; a demagnetization current determiner that compares a demagnetization current threshold with the second signal, and outputs a demagnetization protection signal when the second signal takes a value larger than the demagnetization current threshold; and a short circuit determiner that compares a third signal with a short circuit and outputs an anomaly signal for stopping the inverter when the third signal takes a value larger than or equal to the short circuit threshold.

A power inverter includes a bridge circuit including a first half-bridge and a second half-bridge, each half-bridge including a high-side device and a low-side device, and a gate driver circuit connected with each gate of the high-side device and low-side power device of the first and second half-bridges and operable to provide each gate with a respective voltage to control operation of the respective power device. The gate driver is operable to provide a first voltage which is higher than a first threshold voltage of the respective power device, and a second voltage which is higher than a surge threshold of the respective power device. The surge threshold is higher than the first threshold and defines the onset of a surge current operation area of the respective power device at which the power device becomes conducts a surge current that is larger than the rated current of the device.

A method, a device, and a system for protecting parallel-connected topology units are provided. A target signal transmitted via the signal synchronization line is obtained, and the target signal is sent to other controllers based on a type of the target signal. If the target signal is a carrier synchronization signal, the current power module is controlled to perform carrier synchronization and to be in a working mode. If the target signal is a power module fault signal, the current power module is controlled to be in a shutdown mode. The signal synchronization lines between the parallel-connected topology units are shared in a time-sharing manner, where the carrier synchronization signal is transmitted if the power module works normally, and the power module fault signal is transmitted if the power module is faulty. The topology units monitor the transmitted target signal in real time for fast synchronous protection.

A short circuit protection apparatus for a power conversion apparatus supplying power to a load via a plurality of switches connected to each other in parallel includes Ma current detectors each configured to detect a sum of currents flowing through two or more switches among the plurality of switches so as to output a detection signal indicative of the sum that is detected, wherein Ma is 1 less than M, which is the number of the plurality of switches, and a short circuit determiner configured to determine, based on detection signals obtained from the respective Ma current detectors, occurrence of short circuit failure in the plurality of switches to output a cutoff instruction signal for stopping on-off drive of the plurality of switches.