An electric drive system including an impedance balancing noise filtering circuit is disclosed. The electric drive system includes a direct current (DC) power source configured to output DC power to an output port and an inverter configured to convert the DC power output by the DC power source into alternating current (AC) power that is provided to an input port of an AC load. The impedance balancing noise filtering circuit includes an impedance bridge electrically intermediate the output port of the DC power source and the input port of the AC load. The impedance balancing noise filtering circuit includes different sets of passive components that are positioned on both the DC-side and the AC-side of the inverter. These sets of passive components are configured to facilitate impedance balancing that reduces common-mode (CM) electromagnetic interference (EMI) emission at the output port of the DC power source.

A method of controlling dissipation of regenerated power in a multi-channel drive system having a plurality of inverters connected in parallel across an input power supply to drive one or more loads via one or more motors. The method includes determining a circulation current demand for the inverters when the drive system is operating in regenerative mode, the circulating current demand being dependent on the regenerated power and applied to the inverters such that the regenerated power flows through the inverters and is dissipated by the inverters.

A method of controlling dissipation of regenerated power in a multi-channel drive system having a plurality of inverters connected in parallel across an input power supply to drive one or more loads via one or more motors. The method includes determining a circulation current demand for the inverters when the drive system is operating in regenerative mode, the circulating current demand being dependent on the regenerated power and applied to the inverters such that the regenerated power flows through the inverters and is dissipated by the inverters.

The present invention provides a Pulse Width Modulation (PWM) method for a Cascaded H-bridge (CHB) converter. Each phase of the converter is provided with n Cascaded H-bridge rectifier circuits, or may also be provided with n Cascaded H-bridge rectifier circuits+1 redundant H-bridge rectifier circuit. The method includes following steps of: S1, generating groups of sinusoidal signals as reference waveforms, and generating n carrier signals having sequentially decreasing levels and equal amplitudes to correspond to the H-bridge rectifier circuit at the first to the n.sup.th levels, where the levels of the n carrier signals are cascaded to fill the voltage amplitude of a unipolar half cycle of the reference waveform; and S2, determining PWM signals for controlling power transistors of the corresponding H-bridge rectifier circuits based on each reference waveform and each carrier signal. According to the present invention, the CHB converter allows the MV grid to be directly coupled with a LV side without a conventional transformer, which reduces the heat loss and balances the distribution of heat loss between the power transistors and between the H-bridges at all levels, thus prolonging the service life.

The present invention provides a Pulse Width Modulation (PWM) method for a Cascaded H-bridge (CHB) converter. Each phase of the converter is provided with n Cascaded H-bridge rectifier circuits, or may also be provided with n Cascaded H-bridge rectifier circuits+1 redundant H-bridge rectifier circuit. The method includes following steps of: S1, generating groups of sinusoidal signals as reference waveforms, and generating n carrier signals having sequentially decreasing levels and equal amplitudes to correspond to the H-bridge rectifier circuit at the first to the n.sup.th levels, where the levels of the n carrier signals are cascaded to fill the voltage amplitude of a unipolar half cycle of the reference waveform; and S2, determining PWM signals for controlling power transistors of the corresponding H-bridge rectifier circuits based on each reference waveform and each carrier signal. According to the present invention, the CHB converter allows the MV grid to be directly coupled with a LV side without a conventional transformer, which reduces the heat loss and balances the distribution of heat loss between the power transistors and between the H-bridges at all levels, thus prolonging the service life.

This application provides a motor drive system, a power system, and an electric vehicle, and relates to the field of power electronic technologies. The drive system is configured to drive a motor that uses a power battery pack as a power supply. The power battery pack includes at least two battery modules that are independent of each other, the drive system includes at least two direct current-alternating current DC-AC circuits, and the battery modules one-to-one correspond to the DC-AC circuits. Each battery module is correspondingly connected to an input end of one DC-AC circuit, and an output end of each DC-AC circuit is connected to a corresponding winding of the motor. The DC-AC circuit is configured to convert a direct current provided by the corresponding battery module into an alternating current to drive the corresponding winding of the motor.

A plurality of generators redundantly supply power to AC motors via a main DC bus system having a pair of buses, each of which is connected to each generator by an active front end (AFE) inverter containing an insulated-gate bipolar transistor. Isolated DC/AC inverters are connected to the pair of main buses in pairs, respectively. Each pair of the isolated DC/AC inverters is connected to one of the AC motors with a filter of capacitors and inductors between each inverter and the motor. The AFE inverters and isolated DC/AC inverters galvanically isolate the main buses and enable load sharing among the generators.

A plurality of generators redundantly supply power to AC motors via a main DC bus system having a pair of buses, each of which is connected to each generator by an active front end (AFE) inverter containing an insulated-gate bipolar transistor. Isolated DC/AC inverters are connected to the pair of main buses in pairs, respectively. Each pair of the isolated DC/AC inverters is connected to one of the AC motors with a filter of capacitors and inductors between each inverter and the motor. The AFE inverters and isolated DC/AC inverters galvanically isolate the main buses and enable load sharing among the generators.

An apparatus configured for driving a motor, includes a first inverter including a first switching elements and connected to a first end of each of a windings respectively corresponding to a plurality of phases of the motor, a second inverter including a second switching elements and connected to a second end of each of the windings, a switches including first ends respectively connected to nodes to which the windings and the second switching elements are respectively connected and second ends connected to each other, and a controller configured to drive the motor in one of a first driving mode for driving the motor by maintaining the second switching elements in an open state and performing pulse width modulation control for the first switching elements and a second driving mode for driving the motor by performing pulse width modulation control for the first switching elements and the second switching elements.

A controller includes a first processor for a first power inverter. Computer-readable media is configured to store computer-executable instructions configured to cause the first processor to: generate a first clock signal and a second clock signal; identify a pulse width modulation method of the first power inverter and a pulse width modulation method of a second power inverter; identify and compare a switching frequency of the first power inverter and a switching frequency of the second power inverter; determine an optimized phase shift between the first power inverter and the second power inverter responsive to the pulse width modulation method of the first power inverter and the pulse width modulation method of the second power inverter and the switching frequency of the first power inverter and the switching frequency of the second power inverter; and synchronize the optimized phase shift between the first power inverter and the second power inverter. A second processor for the second power inverter is configured to receive the second clock signal.