A three phase inverter can include: a first converter and a second converter connected to an input source in parallel, respectively; a first single phase inverter connected to the first converter through a first inverter first input node and a first inverter second input node and providing a first inverter first output node and a first inverter second output node; a second single phase inverter connected to the second converter through a second inverter first input node and a second inverter second input node and providing a second inverter first output node and a second inverter second output node; and a common output node connected to the first inverter first output node and the second inverter first output node.

A three phase inverter can include: a first converter and a second converter connected to an input source in parallel, respectively; a first single phase inverter connected to the first converter through a first inverter first input node and a first inverter second input node and providing a first inverter first output node and a first inverter second output node; a second single phase inverter connected to the second converter through a second inverter first input node and a second inverter second input node and providing a second inverter first output node and a second inverter second output node; and a common output node connected to the first inverter first output node and the second inverter first output node.

A power conversion device includes a plurality of converter cells 1, and the converter cell 1 includes: an upper arm 13u, which includes a semiconductor switching element 11u configured to allow conduction in only one direction and a diode 12u connected in anti-parallel to the semiconductor switching element 11u; and a lower arm 13b, which is connected to the upper arm 13u, and includes a semiconductor switching element 11b configured to allow reverse conduction and a diode 12b connected in anti-parallel to the semiconductor switching element 11b, in which the semiconductor switching element 11b and the diode 12b of the lower arm 13b are simultaneously set to conductive states to split an electric current to flow through the diode 12b to the semiconductor switching element 11b.

A power conversion device includes a plurality of converter cells 1, and the converter cell 1 includes: an upper arm 13u, which includes a semiconductor switching element 11u configured to allow conduction in only one direction and a diode 12u connected in anti-parallel to the semiconductor switching element 11u; and a lower arm 13b, which is connected to the upper arm 13u, and includes a semiconductor switching element 11b configured to allow reverse conduction and a diode 12b connected in anti-parallel to the semiconductor switching element 11b, in which the semiconductor switching element 11b and the diode 12b of the lower arm 13b are simultaneously set to conductive states to split an electric current to flow through the diode 12b to the semiconductor switching element 11b.

A single-phase Energy Utilization Tracker (EUT) inverter that comprises two DC/AC conversion modules. At any time, the two modules combined can sequentially extract and convert most the power provided by a DC energy source into two AC power (voltage) trains. The first AC power (voltage) train conforms to the power grid convention; while the second AC power train has a 90 degree phase difference to the specific power line pair. In according to the principle described herein, this single-phase EUT inverter further comprising a phase adjuster to adjust the phase of the second AC power (voltage) train by 90 degrees to become synchronous with the first AC power train; both AC power trains being then suitable to deliver into the same power line.

An apparatus utilizing additive interleaved switchmode (PWM) power conversion stages, having minimal or no output filter, to achieve high bandwidth or even ideally instantaneous power conversion. The additive process may involve voltage stacking of isolated PWM converters, which are interleaved in time, or may involve a single input power supply and inductively combining output currents of PWM power converters interleaved in time, with either additive circuit having minimal or no output filtering. This circuit may overcome limitations for the frequency of feedback control loops once thought to be physical limitations, such as, fundamental switching frequency, output filter delay and the Nyquist criteria.

An apparatus utilizing additive interleaved switchmode (PWM) power conversion stages, having minimal or no output filter, to achieve high bandwidth or even ideally instantaneous power conversion. The additive process may involve voltage stacking of isolated PWM converters, which are interleaved in time, or may involve a single input power supply and inductively combining output currents of PWM power converters interleaved in time, with either additive circuit having minimal or no output filtering. This circuit may overcome limitations for the frequency of feedback control loops once thought to be physical limitations, such as, fundamental switching frequency, output filter delay and the Nyquist criteria.

A multilevel converter includes a first arm connected between a positive voltage terminal and an alternating-current terminal and a second arm connected between the alternating-current terminal and a negative voltage terminal. Each of the first and second arms includes a plurality of cascaded unit cells. Each unit cell has a capacitor charged to a direct-current voltage and outputs a voltage across terminals of the capacitor or 0 V. The plurality of unit cells as being helically cascaded implement a reactor.

A multilevel converter includes a first arm connected between a positive voltage terminal and an alternating-current terminal and a second arm connected between the alternating-current terminal and a negative voltage terminal. Each of the first and second arms includes a plurality of cascaded unit cells. Each unit cell has a capacitor charged to a direct-current voltage and outputs a voltage across terminals of the capacitor or 0 V. The plurality of unit cells as being helically cascaded implement a reactor.

A system and method for controlling a grid-connected inverter to provide negative sequence current during unbalanced grid operating conditions. The system uses a combination of feedforward and feedback controls to compute voltage signals which are used to control the inverter switches. The system includes both positive and negative sequence current controllers with voltage feedforward terms. The measured grid voltage is directly fed forward to the positive sequence control through a predictive algorithm, so that the instantaneous voltage information is kept, reducing the influence of grid voltage harmonics on the quality of the output current. The predictive voltages include positive, negative and harmonic component information of the grid voltage signals.