An electric power conversion device includes a first arm and a second arm each including converter cells. The converter cell of the first arm is a first converter cell having a full-bridge configuration including an energy storing element and semiconductor switching elements. The converter cell of the second arm is a second converter cell having a half-bridge configuration including an energy storing element and semiconductor switching elements. Thus, short-circuit current between DC terminals is suppressed.

In a multilevel converter, three circuit breakers are respectively connected between three arms and three reactors. One circuit breaker is a DC circuit breaker configured to interrupt direct current when a short circuit accident occurs between two DC power transmission lines. Each of the two circuit breakers is an AC circuit breaker configured to interrupt alternating current when the short circuit accident occurs. When the short circuit accident occurs, the two AC circuit breakers are brought into the non-conductive state and then the DC circuit breaker is brought into the non-conductive state, thereby interrupting the short circuit current.

In a multilevel converter, three circuit breakers are respectively connected between three arms and three reactors. One circuit breaker is a DC circuit breaker configured to interrupt direct current when a short circuit accident occurs between two DC power transmission lines. Each of the two circuit breakers is an AC circuit breaker configured to interrupt alternating current when the short circuit accident occurs. When the short circuit accident occurs, the two AC circuit breakers are brought into the non-conductive state and then the DC circuit breaker is brought into the non-conductive state, thereby interrupting the short circuit current.

In one embodiment, an offset voltage generator includes a first limiter configured to compare a first phase-voltage signal with a maximum limit value and a minimum limit value to output a first limit-voltage signal; a second limiter configured to compare a second phase-voltage signal with the maximum limit value and the minimum limit value to output a second limit-voltage signal; a third limiter configured to compare a third phase-voltage signal with the maximum limit value and the minimum limit value to output a third limit-voltage signal; and a summer configured to add a difference between the first phase-voltage signal and the first limit-voltage signal, a difference between the second phase-voltage signal and the second limit-voltage signal, and a difference between the third phase-voltage signal and the third limit-voltage signal, to output an offset voltage.

A multilevel converter includes a first arm connected between a positive voltage terminal and an alternating-current terminal and a second arm connected between the alternating-current terminal and a negative voltage terminal. Each of the first and second arms includes a plurality of cascaded unit cells. Each unit cell has a capacitor charged to a direct-current voltage and outputs a voltage across terminals of the capacitor or 0 V. The plurality of unit cells as being helically cascaded implement a reactor.

A multilevel converter includes a first arm connected between a positive voltage terminal and an alternating-current terminal and a second arm connected between the alternating-current terminal and a negative voltage terminal. Each of the first and second arms includes a plurality of cascaded unit cells. Each unit cell has a capacitor charged to a direct-current voltage and outputs a voltage across terminals of the capacitor or 0 V. The plurality of unit cells as being helically cascaded implement a reactor.

A first control unit outputs a closing-operation command signal to a first switch at a timing calculated based on either a first closing time or a second closing time, whichever is later. The first closing time is a time required for the first switch to transition to a closed state after the first control unit detects a first detection signal indicating that a voltage detected by a voltage detection unit exceeds a predetermined threshold value. The second closing time is a time required for a second switch to transition to a closed state after the first detection signal is detected by a second control unit. The second control unit outputs a closing-operation command signal to the second switch at a timing calculated based on a first time. This can suppress variations in an operating time between a plurality of switches.

This invention presents a highly efficient harmonics free DC-AC power inverter using a pair of push-pull switches with feedback loop that acts as a voltage regulator. The feedback loop voltage regulator uses a series-shunt feedback amplifier to regulate the output voltage by amplifying the error signal between a pure sine wave referenced signal and the measured output voltage signal. A step-up low power transformer is used to step-up the triggering pulse at gates of the push-pull solid state switches to the desired rated output voltage so that the output voltage becomes harmonic free sine wave, but high voltage feedback amplifier, if feasible, maybe used without using the transformer. The reference signal may be synchronized with the grid for on grid applications, but it can also be used for stand alone loads. In order to optimally minimized the conduction power loss across the push-pull solid state switches of the DC-AC inverter, the positive voltage V+ and the negative voltage V must be regulated and controlled, so that the voltage across the push-pull switches are minimized. Hence, two DC-DC converters are used to generate the regulated voltages V+ and V. Each of those voltages is controlled using a feedback loop that drives the pwm of the DC-DC converter. At this point, the conduction power loss of the DC-AC push-pull solid state switches are optimally minimized, but the DC-DC converters are not. In order to minimize the conduction power loss of the DC-DC converters, two multilevel converters with n-array series voltage sources, or n-array series capacitors, are used. The voltage level at the top of each capacitor is carefully selected so that the overall conduction power loss of the DC-DC converters is minimized. The power conduction power loss proportional to the number of levels used but this comes at higher cost and complexity.

A device and method for generating single/split or three phase AC voltages from a DC source with 1 to 2 times gain in output voltage without using any DC/DC boost or an output transformer. An isolation/multiplexer/mixer circuit successively charges multiple power modules, allowing each power module to generate output voltage(s) with desired magnitudes and phases, and allows independent outputs of each power converter modules to be reconnected to obtain up to two times the conventional possible output voltage. An isolation block eliminates the common mode noise problem. The gain in output voltage and isolation between the output converters eliminates the need of the front end DC/DC converter or an output transformer for most of the DC voltage sources, which improves cost, power density, efficiency and reliability of the inverter.

An apparatus includes a two-level converter circuit, a higher-level converter circuit (having switches), and a controller. The controller receives a feedback signal associated with the two-level/higher-level converter circuits and generates a control signal based on the feedback signal. The apparatus operates in one of three modes (first/second/third modes) based on the control signal. In the first mode, the apparatus operates as a two-level converter to generate a two-level output voltage from an input voltage. In a second mode, the apparatus operates as a higher-level converter to increase a number of levels to more than two-levels for the output voltage. In a third mode, the apparatus transitions between the first/second modes where the apparatus operates as the two-level converter and where the switches of the higher-level converter circuit are activated for a period of time to generate a zero voltage at a switching connection point of the apparatus.