A semiconductor device with a novel structure is provided. The semiconductor device includes an oscillation circuit including a first coil, a second coil, a first capacitor, a second capacitor, a first transistor, and a second transistor and a frequency correction circuit including a third capacitor, a fourth capacitor, a third transistor, a fourth transistor, and a switching circuit. The switching circuit has a function of controlling a conduction state or a non-conduction state of the third transistor and the fourth transistor. The frequency correction circuit is provided above the oscillation circuit and has a function of adjusting an oscillation frequency of the oscillation circuit. The first transistor and the second transistor each include a semiconductor layer containing silicon in a channel formation region. The third transistor and the fourth transistor each include a semiconductor layer containing an oxide semiconductor in a channel formation region.

An electronic device may include a transceiver with mixer circuitry that up-converts or down-converts signals based on a voltage-controlled oscillator (VCO) signal. The transceiver circuitry may include first, second, third, and fourth VCOs. Each VCO may include a VCO core that receives a control voltage and an inductor coupled to the VCO core. Fixed linear capacitors may be coupled between the VCO cores. A switching network may be coupled between the VCOs. Control circuitry may place the VCO circuitry in one of four different operating modes and may switch between the operating modes to selectively control current direction in each of the inductors. The VCO circuitry may generate the VCO signal within a respective frequency range in each of the operating modes. The VCO circuitry may exhibit a relatively wide frequency range across all of the operating modes while introducing minimal phase noise to the system.

A varainductor includes a signal line over a substrate. The varainductor further includes a first ground plane over the substrate. The varainductor further includes a first floating plane over the substrate, wherein the first floating plane is between the first ground plane and the signal line, and the first floating plane is a same distance from the substrate as the first ground plane. The varainductor further includes a first transistor configured to selectively electrically connect the first ground plane to the first floating plane. The varainductor further includes a second transistor configured to selectively electrically connect the first ground plane to the first floating plane, wherein a gate of the first transistor is connected to a gate of the second transistor.

A voltage-controlled oscillator includes a first transistor, a second transistor, an inductive impedance element, a first variable capacitive impedance element, and a second variable capacitive impedance element. The first transistor has a source coupled to a first power source, a drain coupled to a first node, and a gate coupled to a second node. The second transistor has a source coupled to the first power source, a drain coupled to the second node, and a gate coupled to the first node. The inductive impedance element has a first terminal coupled to the first node and a second terminal coupled to the second node. The first variable capacitive impedance element has a first terminal coupled to the first node and a second terminal coupled to a third node. The second variable capacitive impedance element has a first terminal coupled to the second node and a second terminal coupled to the third node.

An accurate replica oscillator-based frequency tracking loop (FTL) is provided. The replica oscillator used in the FTL can be at a lower frequency and therefore can consume much lower power compared to a main oscillator, such as an injection locked oscillator (ILO). The proposed FTL accurately sets the free running frequency of an ILO across process, voltage and temperature (PVT). Techniques are also provided to compensate the gain and offset error between the replica oscillator and the ILO.

An element includes a coupling line in which a first conductor layer, a dielectric layer, and a second conductor layer are stacked in this order, and which is connected to the second conductor layer in order to mutually synchronize a plurality of antennas at a frequency of a terahertz wave; and a bias line connecting a power supply for supplying a bias signal to a semiconductor layer and the second conductor layer. A wiring layer in which the coupling line is formed and a wiring layer in which the bias line is formed are different layers. The bias line is disposed in a layer between the first conductor layer and the second conductor layer.

A programmable variable capacitor includes a fixed varactor controlled by a control voltage connected in a first polarity and a plurality of contingent varactors conditionally controlled by the control voltage in accordance with a plurality of logical signals, respectively, each of said plurality of contingent varactors having: a first varactor controlled by a first voltage connected in the first polarity, a second varactor controlled by a second voltage connected in a second polarity, a first multiplexer configured to output the first voltage by selecting between a first DC (direct-current) voltage and the control voltage in accordance with a respective logical signal among said plurality of logical signals, and a second multiplexer configured to output the second voltage by selecting between a second DC voltage and a medium DC voltage in accordance with the respective logical signal.

A high frequency push-push oscillator is disclosed. The high frequency push-push oscillator includes a resonant circuit, including tank transmission lines or an inductor capacitor (LC) tank circuit, for generating a differential signal having a resonant frequency, and a Gm-core circuit for converting the differential signal to an output signal having an output frequency that is higher than the resonant frequency. The Gm-core circuit includes cross-coupled first and second transistors having first and second gates, drains, and sources, respectively, and first and second gate transmission lines. The first and second drains are in electrical communication with the resonant circuit. The first gate transmission line is joined with the first gate and the resonant circuit and the second gate transmission line is joined with the second gate and the resonant circuit. The Gm-core circuit includes a differential transmission line positioned between the first and second gates of the first and second transistors.

A differential oscillator includes a differential circuit and a transformer-coupled band-pass filter (BPF) coupled between first and second output nodes. The BPF includes a coupling device coupled between the output nodes and a transformer including first and second windings in a metal layer of an IC. The first winding includes first and second conductive structures coupled to the first output node and a voltage node, respectively, and a third conductive structure including first and second extending portions connected to the first and second conductive structures, respectively. The second winding includes a fourth conductive structure including a third extending portion coupled to the voltage node and a fourth extending portion coupled to the second output node. The third extending portion is between the second conductive structure and the first extending portion, and the fourth extending portion is between the first conductive structure and the second extending portion.

A technology related to an electronic circuit, specifically, a phase locked loop or a frequency synthesizing apparatus, is disclosed. The frequency synthesizing apparatus includes an injection locked frequency divider and a replica frequency divider having the same circuit configuration as the injection locked frequency divider. A control value required for self-oscillating at a target frequency using the replica frequency divider is determined. When the injection locked frequency divider fails injection locking on a first attempt, the injection locking may be attempted using the determined control value. On the first attempt, the control value of the injection locked frequency divider may be determined and stored in advance according to a temperature and a supply voltage.