A frequency synthesizer (230) is described that includes: a voltage controlled oscillator, VCO (330); a VCO bias circuit (370), operably coupled to the VCO (330) and configured to provide a controllable bias current (384) of the VCO (330); a temperature sensor (372) located in the frequency synthesizer (230) and configured to determine an operating temperature of the frequency synthesizer (230); an analog-to-digital converter, ADC (376), operably coupled to the temperature sensor (372) and configured to provide a digital representation (378) of the determined operating temperature; and a bias control circuit (380) operably coupled to the ADC (376) and the VCO bias circuit (370) and configured to provide a bias control signal (382) to the VCO bias circuit (370) based on the determined operating temperature of the frequency synthesizer (230). The VCO bias circuit (370) is configured to adjust the controllable bias current (384) applied to the VCO based on the bias control signal (382). The frequency synthesizer (230) includes a digitally-controlled bias current adjustment method for a wideband low noise VCO, for example using idle time intervals of signal transitions.

Transformer circuitry comprising: a transformer having a primary coil and a secondary coil, the primary coil having first and second primary terminals and the secondary coil having first and second secondary terminals, and a secondary coil driver configured to drive a secondary voltage signal V2 across the secondary terminals which has a target relationship with a primary voltage signal V1 driven across the primary terminals by a primary coil driver so that an inductance value measured between the primary terminals is governed by the target relationship.

A varainductor includes a signal line over a substrate. The varainductor further includes a first ground plane over the substrate. The varainductor further includes a first floating plane over the substrate, wherein the first floating plane is between the first ground plane and the signal line, and the first floating plane is a same distance from the substrate as the first ground plane. The varainductor further includes a first transistor configured to selectively electrically connect the first ground plane to the first floating plane. The varainductor further includes a second transistor configured to selectively electrically connect the first ground plane to the first floating plane, wherein a gate of the first transistor is connected to a gate of the second transistor.

The present application relates to a differential Colpitts voltage-controlled oscillator (VCO) circuit, which comprises a pair of transistors with control terminals biased by a common biasing voltage and a pair of couplers arranged to cross-couple corrector/drain of the transistors and the base/gate of the differential transistors. The pair of couplers have a coupling factor k.sub.c, which used to enhance the transconductance of the transistor pair, therefore can be used for power consumption reduction and phase noise minimalization.

An inductive switch comprises an inductor that has a primary metallic winding having a boundary configured in shape of a figure eight, such as in two loops, and a plurality of secondary metallic windings arranged within the boundary of the primary metallic winding. The inductive switch includes a plurality of switches, each switch arranged in series with a respective one of the plurality of secondary metallic windings. An equal number of the secondary windings is arranged within each loop. A tunable inductor comprises at least one main metallic loop and at least one secondary metallic loop, wherein the at least one secondary metallic loop comprises a switch that is arranged to configure the at least one secondary metallic loop into at least one shorted metallic loop or at least one closed metallic loop. The at least one shorted loop is floating.

A varainductor includes a signal line, a ground plane, and a floating plane over a substrate. The ground plane is disposed on a side of the signal line, and the first floating plane is disposed between the ground plane and the signal line. An array of switches includes at least two switches configured to selectively electrically connect the ground plane to the floating plane.

A circuit includes a first digital controlled oscillator and a second digital controlled oscillator coupled to the first digital controlled oscillator. A skew detector is connected to determine a skew between outputs of the first digital controlled oscillator and the second digital controlled oscillator, and a decoder is utilized to output a control signal, based on the skew, to modify a frequency of the first digital controlled oscillator using a switched capacitor array to reduce or eliminate the skew.

The present application relates to a differential oscillator circuit. The differential oscillator circuit comprises a pair of transistors with control terminals biased by a common biasing voltage. The differential oscillator circuit further comprises a transformer having a primary coil coupled between first current terminals of the transistors and a secondary coil coupled in a closed series circuit with two varactors, which are arranged for being tuned by a first common tuning voltage. The differential oscillator circuit further comprises a series circuit comprising two further varactors coupled in series to second current terminals of the transistors. The two further varactors are arranged for being tuned by a second common tuning voltage.

A frequency divider includes a signal injection circuit and an oscillating circuit. The signal injection circuit includes a transistor of which a gate receives an input signal with an input frequency, a drain and a source cooperatively provide a first differential signal pair, and a body receives a biasing voltage. The two circuits cooperate to form a tank circuit having a free-running frequency and defining a frequency locking range which is around N times the free-running frequency and within which the input frequency falls. The tank circuit generates a second differential signal pair that is related to the first differential signal pair and that has an oscillating frequency which is one-N.sup.th the input frequency.

A frequency divider includes a signal injection circuit and an oscillating circuit. The signal injection circuit includes a transistor of which a gate receives an input signal with an input frequency, a drain and a source cooperatively provide a first differential signal pair, and a body receives a biasing voltage. The two circuits cooperate to form a tank circuit having a free-running frequency and defining a frequency locking range which is around N times the free-running frequency and within which the input frequency falls. The tank circuit generates a second differential signal pair that is related to the first differential signal pair and that has an oscillating frequency which is one-N.sup.th the input frequency.