A crystal oscillator circuit that can be controlled for fast start-up and for efficient operation is disclosed. The control includes adjusting a voltage applied to a body terminal of a transistor in order to control the amplification of the crystal oscillator. The amplification can be increased, relative to a motional resistance of the crystal oscillator, at start-up to reduce a start-up time necessary for oscillation. The amplification can also be decreased in order to maintain oscillation after start-up more efficiently. In some implementations, the transistor for control is a fully depleted silicon on insulator (FDSOI) transistor that accommodates a wide range of body bias voltages.

A crystal oscillator and a phase noise reduction method thereof are provided. The crystal oscillator may include a crystal oscillator core circuit, a bias circuit coupled to an output terminal of the crystal oscillator core circuit, a pulse wave buffer coupled to the output terminal of the crystal oscillator core circuit, and a phase noise reduction circuit coupled to the output terminal of the crystal oscillator core circuit. The crystal oscillator core circuit may generate a sinusoidal wave. The bias circuit may provide a bias voltage of the sinusoidal wave. The pulse wave buffer may generate a pulse wave according to the sinusoidal wave. The phase noise reduction circuit may generate a reset signal including at least one reset pulse for resetting the bias voltage. In addition, the reset signal is generated without calibrating the at least one reset pulse to a zero-crossing point of the sinusoidal wave.

An oscillator includes: a resonator element; an oscillation circuit configured to oscillate the resonator element to generate a clock signal; a temperature sensor; a digital control circuit configured to operate based on the clock signal and output a control signal based on a temperature detected by the temperature sensor; a temperature control circuit configured to output a control voltage based on the control signal; a temperature control element configured to control a temperature of the resonator element based on the control voltage; and a clock signal abnormality detection circuit configured to detect an abnormality in the clock signal. The clock signal abnormality detection circuit stops an output of the control voltage to the temperature control element performed by the temperature control circuit when the abnormality in the clock signal is detected.

An oscillator includes: a resonator element; an oscillation circuit configured to oscillate the resonator element and generate a clock signal; a first temperature sensor; a digital control circuit configured to operate based on the clock signal and output a control signal based on a temperature detected by the first temperature sensor; a temperature control circuit configured to output a control voltage based on the control signal; a temperature control element configured to control a temperature of the resonator element based on the control voltage; a second temperature sensor; and a second temperature sensor monitoring circuit including an analog circuit and configured to monitor a temperature detected by the second temperature sensor. The temperature control circuit stops a supply of the control voltage to the temperature control element when an abnormality in the temperatures of the first temperature sensor and the second temperature sensor is detected.

An oscillator circuit includes an oscillating circuit coupled to a vibrator, and a control circuit that controls the oscillating circuit. The oscillator circuit has a normal operation mode in which the oscillating circuit oscillates in a state where a negative resistance value is a first value, and a start mode in which the oscillator circuit shifts from a state where oscillation is stopped to the normal operation mode. In the start mode, the control circuit controls the negative resistance value to increase from a second value which is smaller than the first value.

A resonator device includes: a base including a semiconductor substrate; a resonator element; and a lid to be bonded to the base, the lid and the base forming a cavity for accommodating the resonator element. An integrated circuit is disposed at the semiconductor substrate, the integrated circuit including an oscillation circuit electrically coupled to the resonator element, a memory circuit configured to store a reference value of an output characteristic of the resonator element, and a determination circuit configured to compare a detection value of the output characteristic of the resonator element with the reference value and determine an airtight state inside the cavity based on a comparison result.

A method of manufacturing an oscillator including housing a first resonator and a first integrated circuit device configured to oscillate the first resonator in a first container to manufacture the first oscillator, and housing a second resonator and a second integrated circuit device configured to oscillate the second resonator in a second container to manufacture the second oscillator, wherein the first integrated circuit device includes a first oscillation circuit configured to oscillate the first resonator to output a first oscillation signal, and no PLL circuit, the second integrated circuit device includes a second oscillation circuit configured to oscillate the second resonator to output a second oscillation signal, and a PLL circuit to which the second oscillation signal is input, and which is configured to output a third oscillation signal, and the first container and the second container are containers same in type.

A narrow pulse generation circuit used in a sequential equivalent sampling system. The circuit comprises a crystal oscillator, an edge sharpening circuit, an avalanche transistor single-tube amplifying circuit and a shaping network connected in sequence, wherein the edge sharpening circuit is used for carrying out edge sharpening on a square wave signal generated by the crystal oscillator; the avalanche transistor single-tube amplifying circuit is used for carrying out avalanche amplification on the sharpened square wave signal to generate a Gaussian pulse signal to adjust the amplitude of a pulse; and the RC shaping network is used for shaping the Gaussian pulse signal to adjust the pulse width at the bottom of the pulse to form a narrow pulse signal. The narrow pulse circuit has a simple structure and narrow pulse width at the bottom and facilitates increasing a signal-to-noise ratio of a whole sequential sampling system.

An integrated circuit includes an inverter, first and second capacitors, a resistor, and a transistor. The inverter has an input and an output. The first capacitor is coupled to a ground. The transistor has a first transistor terminal, a second transistor terminal, and a control input. The first transistor terminal is coupled to the first capacitor and the second transistor terminal is coupled to the input of the inverter. The second capacitor is coupled between the output of the inverter and the ground. The resistor is coupled between the output of the inverter and the first transistor terminal.

A narrow pulse generation circuit used in a sequential equivalent sampling system. The circuit comprises a crystal oscillator, an edge sharpening circuit, an avalanche transistor single-tube amplifying circuit and a shaping network connected in sequence, wherein the edge sharpening circuit is used for carrying out edge sharpening on a square wave signal generated by the crystal oscillator; the avalanche transistor single-tube amplifying circuit is used for carrying out avalanche amplification on the sharpened square wave signal to generate a Gaussian pulse signal to adjust the amplitude of a pulse; and the RC shaping network is used for shaping the Gaussian pulse signal to adjust the pulse width at the bottom of the pulse to form a narrow pulse signal. The narrow pulse circuit has a simple structure and narrow pulse width at the bottom and facilitates increasing a signal-to-noise ratio of a whole sequential sampling system.