A slow-clock calibration method, a slow-clock calibration unit, a clock circuit and a mobile communication terminal are provided. The calibration method includes: obtaining a current temperature of the crystal; searching a unique frequency-divide coefficient corresponding to the current temperature from a preset data base; if the coefficient is found in the data base, inputting the unique coefficient into a frequency divider; if the coefficient is not found in the data base, obtaining an actual sleep length of the mobile communication terminal, if the actual sleep length is not equal to a required sleep length, calculating a required frequency-divide coefficient and updating the data base with the required frequency-divide coefficient, and if the actual sleep length of the mobile communication terminal is equal to the required sleep length, updating the data base with a current frequency-divide coefficient. Accordingly, slow-clock calibration is realized with reduced crystal costs.

In examples, an electronic device comprises an oscillator circuit configured to provide an output signal and a controller coupled to the oscillator circuit. The controller is configured to receive first and second target rates; dynamically adjust a frequency accuracy of the output signal based on the first target rate; and dynamically adjust an amplitude of the output signal based on the second target rate.

An oscillator includes an external terminal, a resonator, and an oscillation circuit that oscillates the resonator. The oscillation circuit includes an amplification circuit and a current source that supplies a current to the amplification circuit, and the current is variably set according to a control signal input from the external terminal.

A continuous time linear equalizer comprises an input of a first equalizer path configured to receive a first differential input signal; an input of a second equalizer path configured to receive a second differential input signal; a first programmable load capacitor coupled to an output of the first equalizer path; a second programmable load capacitor coupled to an output of the second equalizer path; and a programmable source capacitor coupled between the first equalizer path and the second equalizer path.

Various embodiments of methods and systems for closed loop multimode sleep clock frequency compensation in a portable computing device are disclosed. An exemplary embodiment leverages a modem to determine a frequency shift on a sleep clock signal when a reference clock has transitioned into a power saving mode. Using the frequency shift calculation, a compensation capacitor may be adjusted to deliver a more optimum dummy load on the crystal oscillator when the reference clock is taken offline. The method may iterate through until the actual frequency shift of the sleep clock is within an acceptable tolerance relative to zero and, further, may also set a status bit to indicate that the sleep clock frequency is stable.

A method and apparatus for increasing the Signal-to-Noise Ratio (SNR) of phononic comb teeth generated by a non-linear resonator. The method comprises generating a drive signal; applying the drive signal to the non-linear resonator with sufficient gain to generate the phononic comb teeth; and filtering the drive signal before applying it to the non-linear resonator to thereby increase the Signal-to-Noise Ratio (SNR) of phononic comb teeth generated by the non-linear resonator. The apparatus may comprise a circuit including a filter disposed between an oscillator generating the drive signal and the non-linear resonator, the filter preferably having a 3 db passband width which is less than a spacing of the phononic comb teeth generated by the non-linear resonator.

An oscillator includes an oscillation circuit, an operation state signal generation circuit that generates an operation state signal based on an operation state of the oscillation circuit, and a first integrated circuit, the oscillation circuit and the operation state signal generation circuit are disposed outside the first integrated circuit, and the first integrated circuit includes a first digital interface circuit, a D/A conversion circuit that converts a digital signal input via the first digital interface circuit into an analog signal to generate a frequency control signal that controls a frequency of the oscillation circuit, and a terminal to which the operation state signal is input.

A circuit includes an oscillator having a driver and a resonator. The driver receives a supply voltage at a supply input and provides a drive output to drive the resonator to generate an oscillator output signal. A power converter receives an input voltage and generates the supply voltage to the supply input of the driver. A temperature tracking device in the power converter controls the voltage level of the supply voltage to the supply input of the driver based on temperature such that the supply voltage varies inversely to the temperature of the circuit.

Oscillator quick-startup circuit and method in which a voltage step is applied to a resonator (crystal) resulting in ringing which is amplified and fed into a locking circuit which locks to it, such as a programmable delay circuit. Once locking is complete, then the circuit is switched into a standalone oscillator mode, having a feedback path, the output of this injection oscillator energizes the resonator for achieving quick startup of a primary oscillator, in response to it automatically adjusting injection oscillator frequency to match the frequency of the resonator. A digital circuit controls the configuring of the circuit for applying the voltage step, adjusting the locking circuit, and then switching into a standalone oscillator mode.

An apparatus injects a start clock to a crystal at the beginning to increase an overall start up speed of the crystal. The apparatus relies on an impedance change inside the crystal itself instead of searching for a synchronization on the yet small crystal oscillation. The apparatus includes an oscillator (separate from the crystal) to search for the crystal's resonance frequency by detecting the crystal's impedance change. Once the frequency of the oscillator matches the crystal's resonance, there is significant change in the crystal's impedance. Using that information, the apparatus can lock the oscillator frequency at the crystal resonance frequency and inject the clock with high efficiency.