Apparatus and methods for capacitive load reduction are disclosed. In one embodiment, a power amplifier system includes a plurality of power amplifiers and an envelope tracking module for generating a supply voltage for the power amplifiers. The power amplifier system further includes a switch and a decoupling capacitor operatively associated with a first power amplifier of the system. The switch is configured to electrically float an end of the decoupling capacitor when the first power amplifier is disabled so as to reduce capacitive loading of the envelope tracker and to operate as a dampening resistor when the power amplifier is enabled so as to improve the stability of the system.

There is provided a power amplifier arrangement for amplifying an input power signal to an output power signal. The power amplifier arrangement comprises a main amplifier having an input and an output. The power amplifier arrangement comprises at least one auxiliary amplifier, each having an input and an output. The power amplifier arrangement comprises a power divider having an input and outputs. The input of the power divider is configured to receive the input power signal. Each output of the power divider is connected to a respective input of the power amplifiers. The power amplifier arrangement comprises a Doherty combiner comprising at least one Ruthroff transformer and configured to combine all the outputs of the power amplifiers to, at an output of the Doherty combiner, produce the output power signal.

A multi-finger transistor includes unit transistors each including a first terminal electrically connected to a reference potential, a second terminal that receives an RF signal and a bias current, and a third terminal that outputs an amplified signal; a common input terminal electrically connected in parallel to the second terminals of the unit transistors and that receives the RF signal; a common bias terminal electrically connected in parallel to the second terminals of the unit transistors and that receives the bias current; a common output terminal electrically connected in parallel to the third terminals of the unit transistors and that outputs the amplified signal; and first resistance elements each of which is electrically connected between the common input terminal and the second terminal of a corresponding one of the unit transistors and each of which cuts a DC component of the bias current.

A power amplifier includes a main transistor configured to amplify an input signal and having characteristics of a drain current delay, a replica transistor having the same characteristics of the drain current delay as the characteristics of the main transistor, a temperature of the replica transistor changing in accordance with a temperature of the main transistor, and an envelope signal of the input signal being input to the replica transistor, an extraction circuit configured to extract a delay component due to the drain current delay from an output voltage of the replica transistor and an adder configured to add the delay component to a gate bias voltage to be applied to the main transistor so as to cancel out the drain current delay of the main transistor.

Disclosed is an electronic device comprising: a wireless communication circuit for generating an RF signal, an amplifier circuit electrically connected to the wireless communication circuit and configured to amplify the RF signal, and an antenna connected to the amplifier circuit. The amplifier circuit may comprise: a first amplifier; a second amplifier; a first transmission path connected to an output terminal of the first amplifier and the antenna; a second transmission path connected to an output terminal of the second amplifier and the first transmission path; a first variable impedance circuit located on the first transmission path and configured to change an electrical length of the first transmission path based on the frequency of the RF signal; and a second variable impedance circuit located on the second transmission path and configured to change the electrical length based on a power mode.

Disclosed is an electronic device comprising: a wireless communication circuit for generating an RF signal, an amplifier circuit electrically connected to the wireless communication circuit and configured to amplify the RF signal, and an antenna connected to the amplifier circuit. The amplifier circuit may comprise: a first amplifier; a second amplifier; a first transmission path connected to an output terminal of the first amplifier and the antenna; a second transmission path connected to an output terminal of the second amplifier and the first transmission path; a first variable impedance circuit located on the first transmission path and configured to change an electrical length of the first transmission path based on the frequency of the RF signal; and a second variable impedance circuit located on the second transmission path and configured to change the electrical length based on a power mode.

A radio frequency amplifier includes a first input terminal, a second input terminal, an output terminal, and first and second amplifiers. The first amplifier includes a first amplifier input coupled to the first input terminal, and a first amplifier output. The second amplifier includes a second amplifier input coupled to the second input terminal, and a second amplifier output coupled to the output terminal by an output inductive element. An output combiner circuit is coupled between the first amplifier output and the second amplifier output. The output combiner circuit includes a first inductive element, a capacitor, and a second inductive element. The first inductive element is coupled between the first amplifier output and a first terminal of the capacitor, and the second inductive element is coupled between the second amplifier output and the first terminal of the capacitor. A second terminal of the capacitor is coupled to ground.

A radio frequency amplifier includes a first input terminal, a second input terminal, an output terminal, and first and second amplifiers. The first amplifier includes a first amplifier input coupled to the first input terminal, and a first amplifier output. The second amplifier includes a second amplifier input coupled to the second input terminal, and a second amplifier output coupled to the output terminal by an output inductive element. An output combiner circuit is coupled between the first amplifier output and the second amplifier output. The output combiner circuit includes a first inductive element, a capacitor, and a second inductive element. The first inductive element is coupled between the first amplifier output and a first terminal of the capacitor, and the second inductive element is coupled between the second amplifier output and the first terminal of the capacitor. A second terminal of the capacitor is coupled to ground.