An average power tracking (APT) power amplifier apparatus is provided. In a non-limiting example, the APT power amplifier apparatus includes multiple sets of power amplifier circuits configured to amplify a radio frequency (RF) signal(s) for transmission in different polarizations (e.g., vertical and horizontal). In examples disclosed herein, the APT power amplifier apparatus can be configured to employ a single power management integrated circuit (PMIC) to provide an APT voltage to all of the power amplifier circuits for amplifying the RF signal(s). By employing a single PMIC in the APT power amplifier apparatus, it is possible to reduce footprint, power consumption, and costs of the APT power amplifier apparatus.

An RF power amplifier includes an amplifier device and a shunt-inductance circuit. The amplifier device includes a substrate, a combining node lead, first and second amplifier dies coupled to the substrate, and first and second output circuits. The first and second amplifier dies are configured to amplify first and second input RF signals, respectively, to produce first and second output RF signals at first and second output terminals, respectively. The first output circuit includes a first inductive path connecting the first output terminal to the lead. The second output circuit includes a second inductive path connecting the second output terminal to the lead. The lead is configured to combine the first and second output RF signals to produce a third output RF signal. The shunt-inductance circuit is coupled between the first output terminal and a ground reference.

Included is a compensation circuit having one end connected to another end of a first output circuit and another end of a second output circuit and another end grounded, the compensation circuit having an electrical length of 90 degrees at a first operation frequency and an electrical length of 45 degrees at a second operation frequency which is half of the first operation frequency.

Included is a compensation circuit having one end connected to another end of a first output circuit and another end of a second output circuit and another end grounded, the compensation circuit having an electrical length of 90 degrees at a first operation frequency and an electrical length of 45 degrees at a second operation frequency which is half of the first operation frequency.

A radio frequency (RF) amplifier configured to operate at a fundamental frequency (f.sub.0) includes a transistor with a transistor output, an output matching network coupled to the transistor output, and a reflection absorption circuit. The output matching network includes an output path device connected between the transistor output and an output of the RF amplifier. The reflection absorption circuit is coupled between the transistor output and the output path device, and is configured to absorb reflected signal energy from the output path device.

Apparatus and methods for an inverted Doherty amplifier operating at gigahertz frequencies are described. RF fractional bandwidth and signal bandwidth may be increased over a conventional Doherty amplifier configuration when impedance-matching components and an impedance inverter in an output network of the inverted Doherty amplifier are designed based on characteristics of the main and peaking amplifier and asymmetry factor of the amplifier.

Apparatus and methods for an inverted Doherty amplifier operating at gigahertz frequencies are described. RF fractional bandwidth and signal bandwidth may be increased over a conventional Doherty amplifier configuration when impedance-matching components and an impedance inverter in an output network of the inverted Doherty amplifier are designed based on characteristics of the main and peaking amplifier and asymmetry factor of the amplifier.

Disclosed are a dual-path analog-front-end (AFE) circuit and a dual-path signal receiver characterized by high linearity. The dual-path AFE circuit includes a first reception circuit, a second reception circuit and a multiplexer. The first reception circuit is configured to generate a first analog input signal according to a reception signal in a first mode and configured to be coupled to a first constant-voltage terminal via a first switch circuit in a second mode. The second reception circuit is configured to generate a second analog input signal according to the reception signal in the second mode and configured to be coupled to a second constant-voltage terminal via a second switch circuit in the first mode. The multiplexer is configured to output the first analog input signal in the first mode and output the second analog input signal in the second mode.

The present disclosure relates to a switchable power amplification structure including a first power amplifier (PA), a second PA, a front switching structure, and an end switching structure. The front switching structure is coupled to a radio frequency (RF) input port, and the end switching structure is coupled to an antenna port. Herein, the first PA and the second PA are parallel to each other, each of which is coupled between the front switching structure and the first end switching structure. The front switching structure is configured to selectively couple the first PA and the second PA to the RF input port, while the end switching structure is configured to selectively couple the first PA and the second PA to the first antenna port.

Embodiments of a method and a device are disclosed. In an embodiment, a Doherty amplifier module includes a substrate including a mounting surface, and further includes a first amplifier die, a second amplifier die, and a third amplifier die on the mounting surface. The first amplifier die is configured to amplify a first radio frequency (RF) signal along a first signal path, the second amplifier die is configured to amplify a second RF signal along a second signal path, and the third amplifier die is configured to amplify a third RF signal along a third signal path. A side of the first amplifier die including a first output terminal faces a side of the second amplifier die including a second output terminal. The second signal path is parallel to the first signal path, and the third signal path is orthogonal to the first and second signal paths.