A supply voltage conditioning circuit comprises a differential amplifier, a comparator, a sample and hold (S/H) circuit, and a delay circuit. The differential amplifier receives an input supply voltage and a reference voltage, and outputs a difference signal. The comparator receives the difference signal and a value representative of a noise margin, and outputs a control signal indicative of whether the difference signal is greater than the value representative of the noise margin. The S/H circuit samples the input supply voltage in response to the control signal indicating the difference signal is greater than the noise margin, and outputs a substantially noise free supply voltage. This allows the output supply voltage to track underlying changes in the input supply voltage but filter out noise in the input supply voltage. The delay circuit receives and delays the output supply voltage to generate the reference voltage.

A bias timing control circuit includes a current source, a bias switch circuit, a duty cycle sensing circuit, and a switching control circuit. The bias switch circuit includes a first path switch, connected between an output node of the current source and a bias amplifying circuit, and a second path switch, connected between the output node of the current source and a temperature compensation circuit. The duty cycle sensing circuit is configured to generate a timing control signal based on a duty cycle of a transmission enable signal. The switching control circuit is configured to control a first turn-on time of the first path switch during an initial startup period, and a second turn-on time of the second path switch during a normal driving period subsequent to the initial startup period to adjust a warm-up time of a power amplifying circuit based on the timing control signal.

This application relates to Class D amplifier circuits. A modulator controls a Class D output stage based on a modulator input signal (Dm) to generate an output signal (Vout) which is representative of an input signal (Din). An error block, which may comprise an ADC, generates an error signal (ε) from the output signal and the input signal. In various embodiments the extent to which the error signal (ε) contributes to the modulator input signal (Dm) is variable based on an indication of the amplitude of the input signal (Din). The error signal may be received at a first input of a signal selector block. The input signal may be received at a second input of the signal selector block. The signal selector block may be operable in first and second modes of operation, wherein in the first mode the modulator input signal is based at least in part on the error signal; and in the second mode the modulator input signal is based on the digital input signal and is independent of the error signal. The error signal can be used to reduce distortion at high signal levels but is not used at low signal levels and so the noise floor at low signal levels does not depend on the component of the error block.

Systems and methods are provided for amplifying multiple input signals to generate multiple output signals. An example system includes a first channel, a second channel, and a third channel. The first channel is configured to receive one or more first input signals, process information associated with the one or more first input signals and a first ramp signal, and generate one or more first output signals. The second channel is configured to receive one or more second input signals, process information associated with the one or more second input signals and a second ramp signal, and generate one or more second output signals. The first ramp signal corresponds to a first phase. The second ramp signal corresponds to a second phase. The first phase and the second phase are different.

A supply voltage conditioning circuit comprises a differential amplifier, a comparator, a sample and hold (S/H) circuit, and a delay circuit. The differential amplifier receives an input supply voltage and a reference voltage, and outputs a difference signal. The comparator receives the difference signal and a value representative of a noise margin, and outputs a control signal indicative of whether the difference signal is greater than the value representative of the noise margin. The S/H circuit samples the input supply voltage in response to the control signal indicating the difference signal is greater than the noise margin, and outputs a substantially noise free supply voltage. This allows the output supply voltage to track underlying changes in the input supply voltage but filter out noise in the input supply voltage. The delay circuit receives and delays the output supply voltage to generate the reference voltage.

A class-D amplifier with multiple “nested” levels of feedback. The class-D amplifier surrounds an inner feedback loop, which takes the output of a switching amplifier and corrects for errors generated across the switching amplifier, with additional feedback loops that also take the output of the switching amplifier.

A Class D power amplification modulation system for self-adaptive adjustment of an audio signal is provided, including an amplification circuit module, a pulse width modulation (PWM) circuit module connected to the amplification circuit module, a frequency detection circuit module, a carrier generator module connected to the frequency detection circuit module, an amplitude detection circuit module, a direct current (DC) potential adjustment module connected to the amplitude detection circuit module, and a drive circuit module. A method, a device, a processor, and a computer-readable storage medium are also provided. The characteristics of the circuit in the signal time domain and frequency are improved by simultaneously controlling the amplitude and the frequency of the audio signal, to minimize power consumption of signals with different amplitudes and frequencies, and to improve EMI performance, or to balance the circuit power consumption and EMI characteristics.

A sound output device of the present disclosure includes a controller, a power amplifier, a low-pass filter, and a speaker. The controller includes first and second low-pass filters configured to remove high-frequency components of a sound input signal and a sound output signal, a first peak detection unit configured to detect a peak current of the sound input signal from which the high-frequency component has been removed, a second peak detection unit configured to detect a peak current of the sound output signal from which the high-frequency component has been removed, and a comparison unit configured to compare the peak current with the peak current and determine connection or disconnection of the speaker when a level of the peak current is equal to or higher than a certain level.

The disclosure presents a method and an amplifier system for minimizing variation in an acoustical signal caused by variation in gain of an amplifier, comprising a battery for providing a supply voltage to the amplifier, a digital signal processor for providing the acoustical signal to the amplifier, a controller unit receiving an enablement signal when the supply voltage is in an offset mode, and based on the enablement signal requesting a measured voltage during a time period, and a first analog-to-digital converter configured for measuring the supply voltage to the amplifier when receiving the request from the controller unit or the first analog-to-digital converter is configured for measuring the supply voltage to the amplifier continuously, and where variations in the measured voltage relates to variations in the supply voltage during the time period. Furthermore, the controller unit is configured to predict offset modes (i.e. changes) in the supply voltage based on the enablement signals and a fitting of the measured voltages, and wherein the controller unit is configured to generate a compensating signal based on the fitting and transmit the compensating signal to the digital signal processor, the digital signal processor is then configured to minimize variation in the acoustical signal at the output of the amplifier by compensating the variation in gain of the amplifier based on the compensating signal.

An apparatus for noise reduction in audio signal processing includes a power amplifier, a zero-crossing detector, and a threshold detector. The power amplifier has an input signal terminal for receiving an audio input signal and an output signal terminal. The audio input signal is a digital-to-analog converted version according to a version of a digital audio signal. The power amplifier has an analog gain which is controllable in response to an analog gain control signal. The zero-crossing detector determines a zero-crossing detection signal according to an internal signal provided between the input signal terminal and the output signal terminal. The threshold detector determines a gain setting according to the digital audio signal and the zero-crossing detection signal to generate the analog gain control signal indicating the gain setting, wherein the threshold detector controls the analog gain of the power amplifier according to the analog gain control signal.