Shoot-through condition in a component containing an amplifier with a push-pull output stage is managed. A first current in a first transistor of the output stage is mirrored to generate a first mirrored current. A second current in a second transistor of the output stage is mirrored to generate a second mirrored current. A sum of the first mirrored current and said second mirrored current is generated. When a magnitude of the sum exceeds a first pre-determined threshold, a respective control voltage of the first transistor and the second transistor is adjusted to reduce the first current and the second current at least until the sum falls below a second pre-determined threshold. In an embodiment, the first pre-determined threshold equals the second pre-determined threshold. In an embodiment, the component is a class-L power amplifier.

A power-efficient neutralized signal amplifier for use in ultra-low power narrowband receiver applications. A neutralized signal amplifier having: an impedance transformation element coupled to an amplifier input and having a differential output; a gain cell, having a differential input and a differential output, the differential input coupled to the differential output of the impedance transformation element and the differential output coupled to the amplifier output; and a neutralization element coupled to the gain cell differential output and cross-coupled to the differential output of the impedance transformation element, where the coupling of the neutralization element to the differential output of the impedance transformation element provides that the input impedance of the neutralized signal amplifier is substantially determined by reflected resistive parasitics of the impedance transformation element.

Shoot-through condition in a component containing an amplifier with a push-pull output stage is managed. A first current in a first transistor of the output stage is mirrored to generate a first mirrored current. A second current in a second transistor of the output stage is mirrored to generate a second mirrored current. A sum of the first mirrored current and said second mirrored current is generated. When a magnitude of the sum exceeds a first pre-determined threshold, a respective control voltage of the first transistor and the second transistor is adjusted to reduce the first current and the second current at least until the sum falls below a second pre-determined threshold. In an embodiment, the first pre-determined threshold equals the second pre-determined threshold. In an embodiment, the component is a class-L power amplifier.

A power amplifier device includes first and second pairs of semiconductor switches, transformers, and a zero-crossing detection circuit for detecting a zero voltage crossing of an analog input signal. The switches of the first pair receive a respective positive and negative component of the input signal. The transformers store energy from the positive and negative components, respectively. Each transformer releases accumulated energy when the respective switch of the first pair turns off The switches of the second pair have opposite switching states and are connected between a respective transformer and a load, e.g., a transducer, speak, or motor. Each switch receives released energy from the respective transformer. A switching state of each switch of the second pair changes in response to a detected zero voltage crossing of the input signal to transfer the released energy to the load. A system includes the device and the load.

Techniques are disclosed to allow for a switched capacitor digital power amplifier (PA) that operates using high supply voltage levels beyond twice the maximum voltage rating for any of the transistor terminals such as Vds/Vdg/Vsg.

A power-efficient neutralized signal amplifier for use in ultra-low power narrowband receiver applications. A neutralized signal amplifier having: an impedance transformation element coupled to an amplifier input and having a differential output; a gain cell, having a differential input and a differential output, the differential input coupled to the differential output of the impedance transformation element and the differential output coupled to the amplifier output; and a neutralization element coupled to the gain cell differential output and cross-coupled to the differential output of the impedance transformation element, where the coupling of the neutralization element to the differential output of the impedance transformation element provides that the input impedance of the neutralized signal amplifier is substantially determined by reflected resistive parasitics of the impedance transformation element.

A parallel output linear amplifier is provided that includes a transconductance amplifier configured to receive an analog input signal from an input terminal and amplify the analog input signal. The parallel output linear amplifier also includes a first pre-amplifier connected to the transconductance amplifier and operated using a floating drive voltage, and a cascode class AB amplifier connected to the first pre-amplifier and configured to provide an amplified signal to an output terminal. The parallel output linear amplifier further includes a second pre-amplifier configured connected to the transconductance amplifier and operated using the floating drive voltage, and a cascade class AB amplifier connected to the second pre-amplifier and configured to provide an amplified signal to the output terminal.

A power-efficient neutralized signal amplifier for use in ultra-low power narrowband receiver applications. A neutralized signal amplifier having: an impedance transformation element coupled to an amplifier input and having a differential output; a gain cell, having a differential input and a differential output, the differential input coupled to the differential output of the impedance transformation element and the differential output coupled to the amplifier output; and a neutralization element coupled to the gain cell differential output and cross-coupled to the differential output of the impedance transformation element, where the coupling of the neutralization element to the differential output of the impedance transformation element provides that the input impedance of the neutralized signal amplifier is substantially determined by reflected resistive parasitics of the impedance transformation element.

The power amplifying device includes a first potential line to which a first potential is supplied, a second potential line to which a second potential that is lower than the first potential is supplied and a third potential line to which a third potential that is between the first potential and the second potential is supplied. The power amplifying device includes a first BTL amplifier unit. The power amplifying device includes a second BTL amplifier unit. The power amplifying device includes a third BTL amplifier unit. The power amplifying device includes a fourth BTL amplifier unit that has a seventh output amplifier and an eighth output amplifier.

A power amplifier device includes first and second pairs of semiconductor switches, transformers, and a zero-crossing detection circuit for detecting a zero voltage crossing of an analog input signal. The switches of the first pair receive a respective positive and negative component of the input signal. The transformers store energy from the positive and negative components, respectively. Each transformer releases accumulated energy when the respective switch of the first pair turns off The switches of the second pair have opposite switching states and are connected between a respective transformer and a load, e.g., a transducer, speak, or motor. Each switch receives released energy from the respective transformer. A switching state of each switch of the second pair changes in response to a detected zero voltage crossing of the input signal to transfer the released energy to the load. A system includes the device and the load.