Patent classifications
H03F3/45179
Dynamically biased power amplification
One example includes a device that is comprised of a pre-power amplifier, a power amplifier, a signal path, and a dynamic bias circuit. The pre-power amplifier amplifies an input signal and outputs a first amplified signal. The power amplifier receives the first amplified signal and amplifies the first amplified signal based on a dynamic bias signal to produce a second amplified signal at an output thereof. The signal path is coupled between an output of the pre-power amplifier and an input of the power amplifier. The dynamic bias circuit monitors the first amplified signal, generates the dynamic bias signal, and outputs the dynamic bias into the signal path.
Differential source follower with current steering devices
Describe is a buffer which comprises: a differential source follower coupled to a first input and a second input; first and second current steering devices coupled to the differential source follower; and a current source coupled to the first and second current steering devices. The buffer provides high supply noise rejection ratio (PSRR) together with high bandwidth.
CIRCUIT WHICH REUSES CURRENT TO SYNTHESIZE NEGATIVE IMPEDANCE
A circuit which reuses current to synthesize a negative impedance includes a current source circuit, a differential circuit, and a negative impedance conversion circuit. The current source circuit is arranged to provide at least one predetermined current, wherein the current source circuit has a first connection port and a second connection port, and the first connection port of the current source is coupled to a first reference voltage. The differential circuit is coupled between the second connection port of the current source circuit and a second reference voltage, and is arranged to receive a differential input pair and generate a differential output pair, wherein the differential circuit has a differential output port. The negative impedance conversion circuit is coupled between the differential output port and a third reference voltage, wherein the third reference voltage is different from the first reference voltage.
RECEIVER, MEMORY AND TESTING METHOD
A receiver includes the following: a signal receiving circuit, including a first MOS transistor and a second MOS transistor, where a gate of the first MOS transistor is configured to receive a reference signal and a gate of the second MOS transistor is configured to receive a data signal, and the signal receiving circuit is configured to output a comparison signal, the comparison signal being configured to represent a magnitude relationship between a voltage value of the reference signal and a voltage value of the data signal; and an adjusting circuit, including a third MOS transistor, where a source of the third MOS transistor is connected to a source of the first MOS transistor, a drain of the third MOS transistor is connected to a drain of the first MOS transistor, and a gate of the third MOS transistor is configured to receive an adjusting signal.
SLEW RATE ADJUSTING CIRCUIT FOR ADJUSTING SLEW RATE, BUFFER CIRCUIT INCLUDING SAME, AND SLEW RATE ADJUSTING METHOD
A slew rate adjusting circuit includes an adjustment transistor configured to provide an adjustment current into an output port of an arithmetic amplifier, a first transistor connected between a power line of the arithmetic amplifier and the adjustment transistor, and a second transistor connected between the first transistor and an output node of the output port, wherein the adjustment transistor is turned on by the second transistor in response to a difference between an input voltage and an output voltage being equal to or greater than a reference voltage, and the adjustment current is provided to the output port in response to the adjustment transistor being turned on.
Split mixer current conveyer
The disclosure relates to technology for an apparatus having a current conveyer comprising a first stage having a first differential input, and a second stage having a second differential input. The first and second stages are configured to operate in a push-pull mode to provide an output signal at a current conveyer output between the first stage and the second stage. The apparatus has a first frequency mixer configured to generate a first mixer signal based on an input signal and an oscillator signal having a first frequency. The first frequency mixer is configured to provide the first mixer signal to the first differential input. The apparatus has a second frequency mixer configured to generate a second mixer signal based on the input signal and a second oscillator signal having the first frequency. The second frequency mixer is configured to provide the second mixer signal to the second differential input.
Balun device and differential phase shifter
Balun device and differential phase shifter are provided. The balun device includes a first primary coil, a first secondary coil, a second primary coil and a second secondary coil, the first primary coil having a first terminal receiving a first differential signal, and a second terminal outputting a first in-phase component, the first secondary coil having a first terminal outputting a first component orthogonal to the first in-phase component, and a second terminal coupled to AC ground, the second primary coil having a first terminal receiving a second differential signal, and a second terminal outputting a second in-phase component; the second secondary coil having a first terminal outputting a second component orthogonal to the second in-phase component, and a second terminal coupled to AC ground; phase differences between the first and second differential signals, between the first and second in-phase components, between the first and second orthogonal component are 180°.
Amplifier with low component count and accurate gain
An amplifier including a P-channel transistor having current terminals coupled between a first node and a second node and having a control terminal coupled to a third node receiving an input voltage, an N-channel transistor having current terminals coupled between a fourth node developing an output voltage and a supply voltage reference and having a control terminal coupled to the second node, a first resistor coupled between the first node and a supply voltage, a second resistor coupled between the first and fourth nodes, and a current sink sinking current from the second node to the supply reference node. The amplifier may be converted to differential form for amplifying a differential input voltage. Current devices may be adjusted for common mode, and may be moved or added to improve headroom or to improve power supply rejection. Chopper circuits may be added to reduce 1/f noise.
Amplifier with built in time gain compensation for ultrasound applications
An ultrasound circuit comprising a trans-impedance amplifier (TIA) with built-in time gain compensation functionality is described. The TIA is coupled to an ultrasonic transducer to amplify an electrical signal generated by the ultrasonic transducer in response to receiving an ultrasound signal. The TIA is, in some cases, followed by further analog and digital processing circuitry.
Audio playback under short circuit conditions
An audio system includes an H-bridge. The audio system implements one or more techniques for ensuring a transistor within the H-bridge does not turn on in the event of the detection of a short-circuit on the output of the H-bridge. Other transistors within the H-bridge can turn and thus audio can still be played to a speaker.