A burst-mode TIA circuit for use in PON receivers is provided that supports multiple data rates, has high receiver sensitivity, wide dynamic range, and that performs burst-mode synchronization very quickly. The multi-rate burst-mode TIA circuit has a high-speed data path that has low input-referred noise. Based on the chosen data rate at which the multi-rate burst-mode TIA circuit will operate, the rate select switch selects an appropriate feedback resistor of the resistive feedback network.

An apparatus includes a first field effect transistor (FET) that has a body and is coupled in a circuit. The apparatus also includes a second FET that has a body and is coupled in the circuit. The circuit has an offset because of a mismatch. The apparatus further includes an offset correction circuit coupled to the body of the first FET and to the body of the second FET. The offset correction circuit provides a first offset correction signal to the body of the first FET and provides a second offset correction signal to the body of the second FET.

An apparatus includes a first field effect transistor (FET) that has a body and is coupled in a circuit. The apparatus also includes a second FET that has a body and is coupled in the circuit. The circuit has an offset because of a mismatch. The apparatus further includes an offset correction circuit coupled to the body of the first FET and to the body of the second FET. The offset correction circuit provides a first offset correction signal to the body of the first FET and provides a second offset correction signal to the body of the second FET.

Provided is a semiconductor device including: an amplifier configured by an element made of silicon carbide, and including a differential amplifier circuit that amplifies an input signal; and a power supply circuit that supplies a voltage to the amplifier. Here, the voltage fluctuation amount reduction circuit is inserted between the power supply circuit and the amplifier. As a result, it possible to appropriately eliminate an influence of drift when the amplifier is configured by a semiconductor made of silicon carbide.

Memories might include a controller configured to cause the memory to sample a first current level from a common source to a first input of a transimpedance amplifier (TIA) during a first sensing operation, e.g., of memory cells storing first signed weights, sample a second current level from the common source to the first input of the TIA during a second sensing operation, e.g., of memory cells storing second signed weights, isolate the common source from the first input of the TIA, and supply the sampled first current level to the first input of the TIA and sink the sampled second current level from the first input of the TIA.