In order to operate a power amplifier for synthesizing a plurality of amplifier circuits with high efficiency, the gate voltages of the field-effect transistors (FETs) of the plurality of amplifier circuits are adjusted according to an individual difference in saturated power between the amplifier circuits. Specifically, the output ratios of the amplifier circuits (AMP-4, 8) with low saturated power are reduced, whereas the output ratios of the amplifier circuits (AMP-2, 6) with high saturated power are increased. Thus, a device is operated with high efficiency.

According to an example aspect of the present invention, there is provided an apparatus for an antenna, comprising, a first power amplifier and a second power amplifier and a common ground between the first power amplifier and the second power amplifier, wherein a Radio Frequency, RF, output of the first power amplifier is coupled to the common ground and a RF output of the second power amplifier is coupled to the common ground.

An amplifier includes amplifier circuits connected in series between a ground and a power supply, each amplifier circuit includes: a transistor; and a first capacitance, one end of which is connected to a drain of the transistor, a first amplifier circuit connected closest to the power supply includes a load connected between the drain of the transistor and the power supply, each of the amplifier circuits except for the first amplifier circuit includes a load connected between the drain of the transistor of an own amplifier circuit and a source of the transistor of an amplifier circuit adjacent to the own amplifier circuit, each of the amplifier circuits except for an amplifier circuit connected farthest from the power supply includes a second capacitance connected between the source of the transistor and the ground, and the second capacitance has a capacitance value larger than a capacitance value of the first capacitance.

In accordance with the embodiments of the present disclosure, a rack comprising a frame having first vertical posts on a first side and second vertical posts on a second side, between which a plurality of RF amplifier modules are mounted, is provided. The RF power outputs of the RF amplifier modules are connected to inputs of an RF power combiner to deliver a combined RF power output. The RF power combiner is arranged at least partially in at least one of a first volume between the first vertical posts of the frame or a second volume between the second vertical posts of the frame, thereby reducing a footprint of the rack.

A wireless repeater is disclosed. The wireless repeater can include a main booster with a first gain unit with a first adjustable gain and a second gain unit with a second adjustable gain. The wireless repeater can include a front end booster communicatively coupled to the main booster, with a coaxial cable coupled between the main booster and the front end booster. A test signal generator is configured to generate a direct current test signal or a radio frequency test signal to determine a signal loss of the coaxial cable. The wireless repeater can include a control unit to adjust one or more of the first adjustable gain or the second adjustable gain based on the determined signal loss of the coaxial cable.

A signal booster is disclosed that includes a first interface port, a second interface port, a third interface port, a downlink signal splitter device, an uplink signal splitter device, a main booster and a front-end booster. The uplink signal splitter device can include a first uplink splitter port configured to direct uplink signals from the second interface port towards the first interface port. The uplink signal splitter device can include a second uplink splitter port configured to direct uplink signals from the third interface port towards the first interface port. The main booster can include a main downlink amplification path and a main uplink amplification path. The front-end booster can include a front-end downlink amplification path and a front-end uplink amplification path.

Apparatus and methods for quadrature combined Doherty amplifiers are provided herein. In certain embodiments, a separator is used to separate a radio frequency (RF) input signal into a plurality of input signal components that are amplified by a pair of Doherty amplifiers operating in quadrature. Additionally, a combiner is used to combine a plurality of output signal components generated by the pair of Doherty amplifiers, thereby generating an RF output signal exhibiting quadrature balancing.

A generator including a power combiner is provided. The power combiner includes a plurality of inputs, each input connectable to a respective power amplifier for receiving a respective power signal. A plurality of impedance matching circuit branches is connected to a respective one of the plurality of inputs. Each impedance matching circuit branch includes at least one high pass filter section and at least one low pass filter section through which the respective power signal passes. The impedance matching circuit branches are connected so as to combine the power signals from each power amplifier. An output is provided for outputting the combined power signal.

A sequenced transmit muting wideband power amplifier is provided that includes at least one pre-driver stage having at least a first pre-driver and a second pre-driver. A mute switch selectively establishes a communication path between the first and second pre-drivers or couples the second pre-driver to a termination resistor. A pre-driver switch selectively activates/deactivates the first and second pre-drivers. A driver stage is in communication with the pre-driver stage and includes a first driver. A final amplifier stage is in communication with the driver stage and includes at least one second driver. At least one S-NBS switch is configured to selectively activate/deactivate the first driver and second driver. A controller is configured to activate the at least one pre-driver switch, the mute switch, the at least one S-NBS switch to selectively place the amplifier in one of a transmit mode and a mute mode.

Examples disclosed herein relate to a Doherty Power Amplifier (“DPA”) with integrated second harmonic injection. The DPA includes an amplifier circuit having a carrier amplifier and a peaking amplifier, and a combiner network coupled to the amplifier circuit, the combiner network having a plurality of transmission lines and a LC resonant circuit to inject a second harmonic from the carrier amplifier into the peaking amplifier.