One example includes a device that is comprised of a pre-power amplifier, a power amplifier, a signal path, and a dynamic bias circuit. The pre-power amplifier amplifies an input signal and outputs a first amplified signal. The power amplifier receives the first amplified signal and amplifies the first amplified signal based on a dynamic bias signal to produce a second amplified signal at an output thereof. The signal path is coupled between an output of the pre-power amplifier and an input of the power amplifier. The dynamic bias circuit monitors the first amplified signal, generates the dynamic bias signal, and outputs the dynamic bias into the signal path.

According to one embodiment, a semiconductor device includes an equalizer for receiving a first signal and outputting a second signal that has been adjusted to compensate for attenuation of the first signal. A filter is connected to the output terminal of the equalizer. A cancellation circuit operates to cancel a DC offset in the output of the equalizer. A processing circuit is configured to control the cancellation circuit to cancel the DC offset according to an output from the filter. The processing circuit sets a time constant for the filter to a first value to permit the cancellation circuit to cancel the DC offset when the equalizer is in a first state, and then sets the time constant to a second value when the equalizer is set to a second state to permit the cancellation circuit to cancel the DC offset when the equalizer is in the second state.

The present invention, a Digital Power Amplifier (DPA) with filtered output relates to the transmission circuitry of wireless communications systems and more particularly to high frequency power amplifier circuits using digital intensive techniques on cost efficient semiconductor technologies. Today, we experience an ever-increasing need for low cost, low power wireless transmitters in the millimeter wavelength region. Current solutions rely on analog PA circuits. The background art does not contain a solution for bridging the gap between the operation frequencies of the digital circuits on a cost-efficient technology such as CMOS and the millimeter wavelength transmission frequencies demanded in numerous applications. The DPA allowing the direct feeding of digital data to a high frequency amplifying circuit. In this way, design challenging and costly analog processing up-conversion stages are avoided. The DPA comprises a bank of switching amplifying elements, a switch capacitor trap filter taping on the bank of switching amplifying elements for shaping the frequency characteristic of the produced radio frequency (RF) waveform and an adaptive biasing circuit able of dynamically controlling the power consumption within the switching amplifying elements. It can have a wide spectrum of applications where low cost but high efficiency power amplifiers are needed, such as in the Internet of Things (IoT), Wi-Fi and 5G cellular communications.

Examples disclosed herein relate to a Doherty Power Amplifier (“DPA”) with integrated second harmonic injection. The DPA includes an amplifier circuit having a carrier amplifier and a peaking amplifier, and a combiner network coupled to the amplifier circuit, the combiner network having a plurality of transmission lines and a LC resonant circuit to inject a second harmonic from the carrier amplifier into the peaking amplifier.

A receiver circuit is disclosed. The receiver circuit includes an amplifier configured to generate an RF signal based on a received signal, where the RF signal includes an information signal and a blocker signal modulating an RF carrier frequency. The receiver circuit also includes an RF filter connected to the amplifier, where the RF filter is configured to selectively attenuate the blocker signal.

A resonator element for use in a filter is provided. The resonator element includes a first resonator acoustically coupled to a second or third resonator or both. The first resonator has terminals for incorporation in a filter structure. A tuning circuit is coupled to the second or third resonator or both to enable tuning of the resonator element. The tuning circuit includes a variable capacitor and an inductor.

An amplification apparatus as the embodiment of the present invention includes a switching amplifier and an adjuster. The switching amplifier is driven on the basis of a control signal and amplifies an input signal to be amplified to generate an amplified signal. The adjuster adjusts the control signal before it is inputted into the switching amplifier. Specifically, the adjuster adjusts at least one of a pulse width of the control signal and a delay time of the control signal with respect to the signal to be amplified.

In some embodiments, radio-frequency amplifiers can include a plurality of narrow band power amplifiers implemented. Each narrow band power amplifier can be configured to operate with a high voltage in an average power tracking mode and be capable of being coupled to an output filter associated with a respective individual frequency band. Each narrow band power amplifier can be sized smaller than a wide band power amplifier configured to operate with more than one of the frequency bands associated with the plurality of narrow band power amplifiers.

A high-frequency module (1) includes a first substrate (101), a second substrate (102) that faces the first substrate (101), a support (103) that supports the first substrate (101) and the second substrate (102), and a plurality of high-frequency circuit components arranged in internal space formed by the first substrate (101), the second substrate (102), and the support and on both of facing principal faces of the first substrate (101) and the second substrate (102), and the plurality of high-frequency circuit components include a power amplifier element that constitutes a power amplifier circuit (16).

In accordance with an embodiment, an RF system includes a transmit path having a transmit RF filter and an adjustable transmit phase shifter/matching network coupled between the transmit RF filter and a transmit antenna port, where the adjustable transmit phase shifter/matching network is configured to transform an impedance of the transmit RF filter at a receive frequency from a first lower impedance to a first higher impedance at the transmit antenna port; and a receive path having a receive RF filter and an adjustable receive phase shifter/matching network coupled between the receive RF filter and a receive antenna port, where the adjustable receive phase shifter/matching network is configured to transform an impedance of the receive RF filter at a transmit frequency from a second lower impedance to a second higher impedance at the receive antenna port.