A receiver includes at least a first amplifier configured to receive a received signal and provide a first amplified signal based thereon, a mixer configured to receive the first amplified signal and provide an intermediate frequency signal based thereon and a second amplifier configured to receive the intermediate frequency signal and provide a second amplified signal based thereon. An automatic gain controller for the receiver is configured to, based on a first overload signal indicative of a first frequency range of the first amplified signal having one or more frequency components exceeding a first maximum signal power threshold and a second overload signal indicative of a second frequency range, narrower than the first, of the second amplified signal having one or more frequency components exceeding a second maximum signal power threshold, provide for control of a respective gain of one or both of the first amplifier and the second amplifier.

A broadcast receiving apparatus is provided, which includes an input that receives input signals, a signal processing unit which amplifies only a signal in a band that corresponds to a selected channel from among the input signals, and automatic gain controls with a first sensitivity so that the amplified signal maintains a preset level value, and then outputs the result, a demodulator which demodulates the signals output from the signal processing unit into digital transport stream signals, a controller configured to control the signal processing unit so that the signal is automatic gain controlled with a second sensitivity less sensitive than the first sensitivity, when the selected channel is an ultra high frequency (UHF) range signal.

The present disclosure relates an automatic gain control apparatus and method for rapidly and effectively completing automatic gain control by performing a gain control procedure only three times irrespective of intensity of a received signal using peak values in an analog region and an output signal of an analog-digital converter.

A wireless receiver includes an analog-to-digital converter that converts a signal corresponding to a received signal into a digital signal on the basis of multiple reference voltages and outputs the digital signal. The wireless receiver also includes a control circuit that controls at least one of the multiple reference voltages on the basis of the digital signal that is output from the analog-to-digital converter.

An apparatus includes an amplifier and a gain control circuit. The amplifier may be configured to provide multiple gain steps. The gain control circuit may be configured to provide fast and precise changes between the multiple gain steps of the amplifier. The gain control circuit may be further configured to change an impedance of the amplifier to switch between the gain steps. The gain control circuit may be further configured to compensate for changes in frequency response related to changing the impedance. The gain control circuit may be further configured to inject a complementary charge to an input of the amplifier to correct a bias voltage deviation and a transient caused by the gain control circuit.

A hybrid automatic level control (ALC) system for controlling analog outputs. Within the ALC, a feedback loop passes from an analog circuit to a digital circuit and may provide the level of the analog output to the digital circuit. The digital circuit may use lookup tables to model the responses of analog devices but without associated errors and complications of the analog domain. Some examples of the modeled response include linear frequency responses of analog diodes and frequency responses of analog filters. Based on the received feedback and using the lookup tables modeling the responses, the digital circuit may drive a digital-to-analog converter interfacing the analog circuit to control the level of the analog output.

In one example, a receiver includes: a low noise amplifier (LNA) to receive and amplify a radio frequency (RF) signal, the LNA having a first controllable gain; a mixer to downconvert the RF signal to an intermediate frequency (IF) signal; a programmable gain amplifier (PGA) coupled to the mixer to amplify the IF signal, the PGA having a second controllable gain; a digitizer to digitize the IF signal to a digitized signal; a digital signal processor (DSP) to process the digitized signal; a first detector to output a first detection signal having a first value in response to the IF signal exceeding a first threshold during a first detection period; and a controller to dynamically update a gain setting of one or more of the LNA and the PGA in response to the first detection signal.

In one example, a receiver includes: a low noise amplifier (LNA) to receive and amplify a radio frequency (RF) signal, the LNA having a first controllable gain; a mixer to downconvert the RF signal to an intermediate frequency (IF) signal; a programmable gain amplifier (PGA) coupled to the mixer to amplify the IF signal, the PGA having a second controllable gain; a digitizer to digitize the IF signal to a digitized signal; a digital signal processor (DSP) to process the digitized signal; a first detector to output a first detection signal having a first value in response to the IF signal exceeding a first threshold during a first detection period; and a controller to dynamically update a gain setting of one or more of the LNA and the PGA in response to the first detection signal.

According to one embodiment, a compact low-power receiver comprises first and second analog circuits connected by a digitally controlled interface circuit. The first analog circuit has a first direct-current (DC) offset and a first common mode voltage at an output, and the second analog circuit has a second DC offset and a second common mode voltage at an input. The digitally controlled interface circuit connects the output to the input, and is configured to match the first and second DC offsets and to match the first and second common mode voltages. In one embodiment, the first analog circuit is a variable gain control transimpedance amplifier (TIA) implemented using a current mode buffer, the second analog circuit is a second-order adjustable low-pass filter, whereby a three-pole adjustable low-pass filter in the compact low-power receiver is effectively produced.

Systems, devices, and techniques for performing peak detection are described. A described receiver includes a first amplifier to amplify an input signal to generate a first amplified signal; a mixer to downconvert the first amplified signal to generate a downconverted signal; a second amplifier to amplify the downconverted signal to generate a second amplified signal; a filter, being selectably engageable by the receiver, a peak detector configured to perform voltage measurements of the second amplified signal; and switch circuitry. The switch circuitry is configured to selectably disengage the filter during a first measurement phase during which a first voltage measurement performed by the peak detector is indicative of an output voltage swing of the first amplifier, and to selectably engage the filter during a second measurement phase during which a second voltage measurement performed by the peak detector is indicative of an output voltage swing of the second amplifier.