A torque sensor chip including a semiconductor substrate, an acoustic reflector formed on the semiconductor substrate, and first and second Lamb wave resonators (LWRs). The first LWR is formed on a side of the acoustic reflector opposite the semiconductor substrate. The first LWR is at a first angle with respect to an axis of the IC. The second LWR also is formed on the side of the acoustic reflector opposite the semiconductor substrate. The second LWR is at a second angle, different than the first angle, with respect to the axis of the IC.

An acoustic wave device includes in order a substrate, an acoustic reflection layer, a piezoelectric layer, an IDT electrode including a pair of comb electrodes, and wiring electrodes. The acoustic reflection layer includes a low Z dielectric layer, a high Z dielectric layer below the low Z dielectric layer and having an acoustic impedance higher than that of the low Z dielectric layer, and a metal layer above the low Z dielectric layer and having an acoustic impedance higher than that of the low Z dielectric layer. When the acoustic reflection layer is viewed in plan, in a region encompassing the IDT electrode and the wiring electrodes but no IDT electrodes other than the IDT electrode, an area including the metal layer is smaller than an area including the high Z dielectric layer.

In an elastic wave device, a piezoelectric substrate is stacked on a support substrate and an IDT electrode is provided on the piezoelectric substrate. Wiring line portions are provided on the piezoelectric substrate. A first hollow portion is provided in the support substrate at least below at least one of the wiring line portions and or below a region between the wiring line portions.

An acoustic wave filter device includes first and second acoustic wave filters provided on a piezoelectric substrate, an insulating layer that is provided on the piezoelectric substrate and has a smaller dielectric constant than the piezoelectric substrate, a first wiring conductor electrically connected to an electrode of the first acoustic wave filter, a second wiring conductor electrically connected to an electrode of the second acoustic wave filter, the first wiring conductor and the second wiring conductor facing each other on the insulating layer in plan view, and a ground conductor located between the insulating layer and the piezoelectric substrate in a region A circumscribing the first wiring conductor and the second wiring conductor on the insulating layer in plan view.

A bonded wafer with low carrier lifetime in silicon comprises a silicon substrate having opposing top and bottom surfaces; a piezoelectric layer bonded over the top surface of the silicon substrate and having opposing top and bottom surfaces separated by a distance T; and a pair of electrodes having fingers that are inter-digitally dispersed on the top surface of the piezoelectric layer in a pattern having a center-to-center distance D between adjacent fingers of the same electrode, the electrodes comprising a portion of a Surface Acoustic Wave (SAW) device. A structure of the silicon in a top portion of the silicon substrate has been modified to reduce carrier lifetime and prevent the creation of a parasitic conductance within the top portion of the silicon substrate during operation of the SAW device.

A surface acoustic wave (SAW) structure is provided. The SAW structure includes an interdigital transducer (IDT) over a first surface of a piezoelectric structure. The IDT includes a first electrode finger and a second electrode finger arranged in parallel along a first direction and at least partially overlapped with each other. The SAW structure also includes a first embedded acoustic reflector in the piezoelectric structure on one side of the IDT along a second direction, and a second embedded acoustic reflector in the piezoelectric structure on another side of the IDT along the second direction. A first surface of each of the first embedded acoustic reflector and the second embedded acoustic reflector is coplanar with the first surface of the piezoelectric structure. A second surface of each of the first embedded acoustic reflector and the second embedded acoustic reflector is located between the first surface and a second surface of the piezoelectric structure.

Acoustic wave devices and interdigital transducer (IDT) arrangements for surface acoustic wave (SAW) devices are disclosed. Representative SAW devices are described herein that provide sharp transitions between passband frequencies and frequencies that are outside of desired passbands. A SAW device may include several IDTs arranged between reflective structures on a piezoelectric material and one or more additional IDTs or electrode pairs that are configured to modify the influence of parasitic capacitance, or other internal device capacitance, thereby improving steepness on the upper side of a passband as well as improving rejection for frequencies outside of the passband. The one or more additional IDTs or electrode pairs may be configured as at least one of a capacitor, an IDT capacitor, an IDT with a floating electrode, or combinations thereof.

A transmission filter is arranged in a first filter region and has one or more acoustic wave resonators, a plurality of terminal electrodes, and a plurality of wires. A reception filter is arranged in a second filter region and has one or more acoustic wave resonators, a plurality of terminal electrodes, and a plurality of wires. The first filter region and the second filter region are arranged adjacently to each other and have at least sides constituting a pair and opposing to each other. At least either one of the first filter region and the second filter region has no wire extending along one side in a forbidden region that is defined by a width including a terminal electrode nearest to the one side, along the one side and over the one side opposing to the other filter region.

A support substrate for a passive electronic component, the support substrate including: a semiconductor substrate; a charge trap layer on the semiconductor substrate and having a higher crystal defect density than the semiconductor substrate; and an insulating layer on the charge trap layer. In a first aspect, the insulating layer is composed of silicon nitride, and an atomic concentration ratio of N to a total amount of Si and N in the insulating layer is not greater than 45 atom %. In a second aspect, the insulating layer includes a first insulating layer on the charge trap layer; and a second insulating layer on the first insulating layer, wherein a first fixed charge within the first insulating layer and a second fixed charge within the second insulating layer have opposite polarities, and the first insulating layer has a thickness of not less than 0.5 nm and not greater than 3 nm.

A method of fabricating a bonded wafer with low carrier lifetime in silicon comprises providing a silicon substrate having opposing top and bottom surfaces, modifying a top portion of the silicon substrate to reduce carrier lifetime in the top portion relative to the carrier lifetime in portions of the silicon substrate other than the top portion, bonding a piezoelectric layer having opposing top and bottom surfaces separated by a distance T over the top surface of the silicon substrate, and providing a pair of electrodes having fingers that are inter-digitally dispersed on a top surface of the piezoelectric layer, the electrodes comprising a portion of a Surface Acoustic Wave (SAW) device. The modifying and bonding steps may be performed in any order. The modified top portion of the silicon substrate prevents the creation of a parasitic conductance within that portion during operation of the SAW device.